Path: utzoo!mnetor!uunet!husc6!cmcl2!nrl-cmf!ames!oliveb!pyramid!prls!mips!mash
From: mash@mips.COM (John Mashey)
Newsgroups: comp.arch
Subject: Re: Do RISC Compilers Consider Multipro
Message-ID: <2154@winchester.mips.COM>
Date: 9 May 88 05:25:24 GMT
References: <620@speedy.mcnc.org> <28200140@urbsdc> <1988May8.022544.17676@utzoo.uucp>
Reply-To: mash@winchester.UUCP (John Mashey)
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 27

In article <1988May8.022544.17676@utzoo.uucp> henry@utzoo.uucp (Henry Spencer) writes:
>> Agree with your concern - many RISCs, especially those with register 
>> windows, have greatly increased context switch penalties.

>However, they may be able to get more done between context switches, by
>virtue of the extra performance bought by that extra state.  This may well
>end up reducing the average degree of multiprogramming and the number of
>context switches.  Context-switch penalty BY ITSELF is significant only
>if you're interested in latency to the near-total exclusion of throughput.

As has been noted earlier, lots of other factors (UNIX kernel code in
general, cache & tlb manipulation), may well consume much more time
than loading/storing registers.  On a 25MHz R3000, saving or restoring
the (32ish) CPU regs takes about 2-3 microseconds, as does save/restore of
the FP regs (which only happens when needed).   In a UNIX environment,
that is just plain irrelevant, compared to the rest.

However, total context-switch penalty is hardly irrelevant in some
multi-user environments where you have bunches of people running
vi/emacs, etc or X clients, i.e., where there are lots of processes that
handle a keystroke or two, do a small amount of work, and then
block waiting for the next character.
-- 
-john mashey	DISCLAIMER: 
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