Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!joe!petolino From: petolino%joe@Sun.COM (Joe Petolino) Newsgroups: comp.arch Subject: Re: SPARC and multiprocessing Message-ID: <52365@sun.uucp> Date: 7 May 88 00:04:57 GMT References: <22227@pyramid.pyramid.com> Sender: news@sun.uucp Reply-To: petolino@sun.UUCP (Joe Petolino) Organization: Sun Microsystems, Mountain View Lines: 50 >>> ...In order to >>> properly snoop, all of the aliases must be checked for in the cache. >> >>Nah, it ain't that hard. One can have a virtually mapped, physically tagged >>cache. As the virtual cache is filled with data, the translated physical >>address from the MMU is written into the tag RAMs. The physical tags are >>then used by the bus watcher to selectively invalidate the cache entries. > >This only works for small caches. Once the size of each set of the cache >exceeds your page size, the location of an entry in a physically mapped >"remote invalidation tag memory" will be different than the location of >that entry in the virtually mapped cache. This is because the page index >alone is no longer sufficient to address the cache. > >This problem can be solved by passing part of the virtual page address >along with the physical address on memory requests. Then the remote tag >can be addressed with the virtual address and guarantee mapping to the >same location. But this works only if synonyms are not allowed. > > . . . Is there a >good solution to snooping a virtually mapped cache with the following >constraints: >(1) Synonyms are allowed >(2) The cache is large enough that the size of a set exceeds the page size ^^^ (you don't really mean 'set' here, do you :-) ) The problem of finding virtual aliases in a virtually-addressed cache is not unique to multiprocessor systems. A cache deeper than the page size can harbor more than one copy of the same line if unrestricted aliases are allowed. That can cause problems even with a single processor. I've seen a few solutions to this problem: 1) Use a high enough degree of cache associativity so that you get the desired cache size with a one-page-deep cache. This was used on the Amdahl 470/V7 (eight-way set associative!). This violates constraint 2 (above). 2) Restrict virtual addresses so that no two aliases map into different cache sets ('set' used differently here than above). This is used by Sun systems. It technically violates constraint 1 (but not by much). 3) When doing the snooping, sequentially search all the possible places where that data might be (this is done while waiting for memory to respond). This is used in the Amdahl 5890, which has to look in four 2-element instruction-cache sets and eight 2-element data-cache sets on each processor. My first two examples are from single-processor machines. -Joe