Path: utzoo!mnetor!uunet!husc6!bloom-beacon!tut.cis.ohio-state.edu!uwmcsd1!ig!agate!ucbvax!decwrl!decvax!dartvax!news
From: news@dartvax.Dartmouth.EDU (USENET News System)
Newsgroups: comp.arch
Subject: Re: SPARC and multiprocessing
Message-ID: <8412@dartvax.Dartmouth.EDU>
Date: 10 May 88 16:40:55 GMT
Organization: Dartmouth College, Hanover, NH
Lines: 20
Summary: Somebody *has* "solved" the virt. addr. cache consistency

Expires: 
References: <1521@pt.cs.cmu.edu> <28200135@urbsdc> <4921@bloom-beacon.MIT.EDU> <1671@alliant.Alliant.COM>
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Reply-To: fagin@eleazar.dartmouth.edu (Barry S. Fagin)
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Organization: Dartmouth College, Hanover, NH
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From: fagin@eleazar.dartmouth.edu (Barry S. Fagin)
Path: eleazar.dartmouth.edu!fagin

Jeff Collins writes:

>	As far as I know, no one has solved the virtual cache coherency
>	problem yet...

	Check out the SPUR project at Berkeley, a RISC multiprocessor that
uses virtual address caches.

--Barry