From | Subject | Date |
---|---|---|
wulf@uvacs.CS.VIRGINIA.EDU (Bill Wulf) | Re: The WM Machine (continued) | 6 May 88 17:41:46 GMT |
wulf@uvacs.CS.VIRGINIA.EDU (Bill Wulf) | Re: The WM Machine | 6 May 88 17:54:19 GMT |
jamesa%betelgeuse@Sun.COM (James D. Allen) | True Horror Stories | 6 May 88 16:24:46 GMT |
jeffs@pyrthoth (Jeff Sewall) | Re: SPARC and multiprocessing | 6 May 88 18:36:46 GMT |
matloff@iris.ucdavis.edu (Norm Matloff) | Re: Computer Architecture and Organization (the class) | 6 May 88 19:26:59 GMT |
bcase@Apple.COM (Brian Case) | Re: RISC a short answer?? | 6 May 88 17:37:31 GMT |
mat@amdahl.uts.amdahl.com (Mike Taylor) | Amdahl 5990 benchmarks | 6 May 88 22:19:44 GMT |
livesey@sun.uucp (Jon Livesey) | Re: RISC a short answer?? | 6 May 88 21:46:54 GMT |
baum@apple.UUCP (Allen J. Baum) | Re: RISC a short answer?? | 6 May 88 18:45:18 GMT |
petolino%joe@Sun.COM (Joe Petolino) | Re: SPARC and multiprocessing | 7 May 88 00:04:57 GMT |
tve@alice.UUCP | Re: SPARC and multiprocessing | 4 May 88 23:24:22 GMT |
rick@pcrat.UUCP (Rick Richardson) | Re: Cost of Low-end RISCS for RTC (was Re: RISC != real-time control) | 6 May 88 15:23:34 GMT |
pase@ogcvax.ogc.edu (Douglas M. Pase) | Re: Universal OS & universal language | 5 May 88 23:47:44 GMT |
pavlov@hscfvax.harvard.edu (G.Pavlov) | Re: Unix machines for large databases | 6 May 88 13:06:56 GMT |
chris@mimsy.UUCP (Chris Torek) | Re: SPARC and multiprocessing | 7 May 88 07:53:03 GMT |
chuck@amdahl.uts.amdahl.com (Charles Simmons) | Re: Unix machines for large databases | 7 May 88 14:16:59 GMT |
henry@utzoo.uucp (Henry Spencer) | Re: Do RISC Compilers Consider Multipro | Sun, 8 May 88 02:25:44 GMT |
henry@utzoo.uucp (Henry Spencer) | RISC registers | Sun, 8 May 88 02:28:36 GMT |
rbl@nitrex.UUCP ( Dr. Robin Lake ) | Re: Disk drives -- speed of? | 6 May 88 14:09:44 GMT |
markv@uoregon.uoregon.edu (Mark VandeWettering) | Re: Survey of architectures was (Re | 7 May 88 07:56:15 GMT |
henry@utzoo.uucp (Henry Spencer) | Re: RISC a short answer?? | Sun, 8 May 88 02:39:58 GMT |
davek@rtech.UUCP (Dave Kellogg) | Re: Unix machines for large databases | 7 May 88 08:09:54 GMT |
ian@esl.UUCP (Ian Kaplan) | Re: Do RISC Compilers Consider Multiprogramming? | 6 May 88 20:19:14 GMT |
eric@snark.UUCP (Eric S. Raymond) | Re: Is the Intel memory model safe from NO-ONE ?!? | 7 May 88 13:01:14 GMT |
lgy@pupthy2.PRINCETON.EDU (Larry Yaffe) | Re: RISC a short answer?? | 7 May 88 18:38:00 GMT |
pardo@june.cs.washington.edu (David Keppel) | Re: Unix machines for large databases | 7 May 88 23:14:19 GMT |
guy@gorodish.Sun.COM (Guy Harris) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 00:24:28 GMT |
john@anasaz.UUCP (John Moore) | Re: Do RISC Compilers Consider Multiprogramming? | 7 May 88 03:03:47 GMT |
chuck@amdahl.uts.amdahl.com (Charles Simmons) | Re: CISC strikes back. | 8 May 88 09:31:47 GMT |
peter@sugar.UUCP (Peter da Silva) | Re: RISC != real-time control | 7 May 88 17:36:48 GMT |
jack@swlabs.UUCP (Jack Bonn) | Re: RISC != real-time control | 8 May 88 13:38:06 GMT |
root@mfci.UUCP (SuperUser) | Re: RISC a short answer?? | 8 May 88 15:00:53 GMT |
rminnich@udel.EDU (Ron Minnich) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 16:50:07 GMT |
rminnich@udel.EDU (Ron Minnich) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 16:57:23 GMT |
daveb@geac.UUCP (David Collier-Brown) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 21:53:26 GMT |
mangler@cit-vax.Caltech.Edu (Don Speck) | Re: RISC a short answer?? | 8 May 88 23:41:08 GMT |
guy@gorodish.Sun.COM (Guy Harris) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 22:48:02 GMT |
lamaster@ames.arpa (Hugh LaMaster) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 01:01:12 GMT |
daveb@geac.UUCP (David Collier-Brown) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 21:53:26 GMT |
radford@calgary.UUCP (Radford Neal) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 19:59:46 GMT |
ok@quintus.UUCP (Richard A. O'Keefe) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 10:30:36 GMT |
mash@mips.COM (John Mashey) | Re: Do RISC Compilers Consider Multipro | 9 May 88 05:25:24 GMT |
mfci!root@uunet.uu.net (SuperUser) | Re: Instruction scheduling on a VLIW machine | 9 May 88 12:19:03 GMT |
rroot@edm.UUCP (uucp) | Re: Is the Intel memory model safe from NO-ONE ?!? | 8 May 88 14:43:36 GMT |
jlg@a.UUCP (Jim Giles) | Re: RISC a short answer?? | 6 May 88 17:20:58 GMT |
root@mfci.UUCP (SuperUser) | Re: RISC a short answer?? | 9 May 88 11:47:14 GMT |
news@edm.UUCP (news software) | Re: Unix machines for large databases | 9 May 88 04:47:18 GMT |
alan@pdn.UUCP (Alan Lovejoy) | Re: RISC a short answer?? | 9 May 88 14:18:25 GMT |
rminnich@udel.EDU (Ron Minnich) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 15:21:38 GMT |
mills-c@cypress.cis.ohio-state.edu (Christopher Mills) | Re: Do RISC Compilers Consider Multiprogramming? | 9 May 88 16:54:02 GMT |
nather@ut-sally.UUCP (Ed Nather) | Re: RISC != real-time control | 9 May 88 15:06:51 GMT |
milbery@rtech.UUCP (Jim Milbery) | Re: Unix machines for large databases | 9 May 88 15:28:07 GMT |
wulf@uvacs.CS.VIRGINIA.EDU (Bill Wulf) | negative addresses | 9 May 88 14:08:24 GMT |
guy@gorodish.Sun.COM (Guy Harris) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 18:47:53 GMT |
jk3k+@andrew.cmu.edu (Joe Keane) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 20:50:24 GMT |
alan@pdn.UUCP (Alan Lovejoy) | Re: RISC a short answer?? | 10 May 88 01:07:10 GMT |
mouse@mcgill-vision.UUCP (der Mouse) | Re: 80960 IO | 9 May 88 22:07:51 GMT |
mouse@mcgill-vision.UUCP (der Mouse) | Benchmark names: origins | 9 May 88 22:21:43 GMT |
henry@utzoo.uucp (Henry Spencer) | Re: negative addresses | Tue, 10 May 88 18:07:15 GMT |
alexande@drivax.UUCP (Mark Alexander) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 17:37:42 GMT |
mouse@mcgill-vision.UUCP (der Mouse) | Re: Universal OS (striving for flexibility) | 9 May 88 23:07:26 GMT |
mouse@mcgill-vision.UUCP (der Mouse) | Re: Universal OS (was Re: Survey of | 9 May 88 23:24:10 GMT |
mouse@mcgill-vision.UUCP (der Mouse) | Re: Universal OS (striving for flexibility) | 9 May 88 23:39:34 GMT |
mch@computing-maths.cardiff.ac.uk (Major Kano) | mail trouble (anyone but peter@mips.com hit 'n') | 6 May 88 14:41:55 GMT |
barmar@think.COM (Barry Margolin) | Re: Is the Intel memory model safe from NO-ONE ?!? | 10 May 88 06:52:28 GMT |
daveb@geac.UUCP (David Collier-Brown) | Re: RISC a short answer?? | 10 May 88 13:10:34 GMT |
daveb@geac.UUCP (David Collier-Brown) | Re: Is the Intel memory model safe from NO-ONE ?!? | 10 May 88 13:14:31 GMT |
tomer@TAURUS.BITNET | cray computers | 10 May 88 07:10:52 GMT |
mcdonald@uxe.cso.uiuc.edu | Re: RISC != real-time control (actu | 9 May 88 19:19:00 GMT |
aglew@urbsdc.Urbana.Gould.COM | Re: ZFOD before COW | 9 May 88 19:21:00 GMT |
aglew@urbsdc.Urbana.Gould.COM | Re: virtual cache coherency | 9 May 88 19:27:00 GMT |
mash@mips.COM (John Mashey) | Re: CISC strikes back. | 10 May 88 05:54:15 GMT |
steckel@Alliant.COM (Geoff Steckel) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 22:31:23 GMT |
davidsen@steinmetz.ge.com (William E. Davidsen Jr) | Re: negative addresses | 10 May 88 14:17:39 GMT |
mcg@omepd (Steven McGeady) | Re: Is the Intel memory model safe from NO-ONE ?!? | 9 May 88 16:21:11 GMT |
oconnor@sungoddess.steinmetz (Dennis M. O'Connor) | Re: negative addresses | 10 May 88 14:38:30 GMT |
crowl@cs.rochester.edu (Lawrence Crowl) | Re: Today's dumb question... | 10 May 88 14:16:13 GMT |
crowl@cs.rochester.edu (Lawrence Crowl) | Is Shared Memory Necessary? | 10 May 88 14:32:36 GMT |
crowl@cs.rochester.edu (Lawrence Crowl) | RISC vs CISC on Low-End Processors | 10 May 88 15:43:19 GMT |
rrr@naucse.UUCP (Bob Rose ) | Re: negative addresses | 10 May 88 16:16:34 GMT |
joe@rb-dc1.UUCP (Joe Hollinger) | Re: Do RISC Compilers Consider Multipro | 9 May 88 18:09:53 GMT |
ron@mucmot.UUCP (Ron Voss) | Re: RISC a short answer?? | 10 May 88 11:50:05 GMT |
mahar@weitek.UUCP (Mike Mahar) | Re: negative addresses | 10 May 88 16:37:55 GMT |
news@dartvax.Dartmouth.EDU (USENET News System) | Re: SPARC and multiprocessing | 10 May 88 16:40:55 GMT |
bcase@Apple.COM (Brian Case) | Re: negative addresses | 10 May 88 17:57:26 GMT |
glennw@nsc.nsc.com (Glenn Weinberg) | Re: Today's dumb question... | 10 May 88 18:07:24 GMT |
schooler@oak.bbn.com (Richard Schooler) | Re: negative addresses | 10 May 88 21:04:30 GMT |
boughter@ghostwheel.UUCP (Ellen Boughter) | Re: Unix machines for large databases | 10 May 88 17:27:37 GMT |
tim@amdcad.AMD.COM (Tim Olson) | Re: negative addresses | 10 May 88 20:36:35 GMT |
hjm@cernvax.UUCP (hjm) | Re: Today's dumb question... | 9 May 88 16:15:32 GMT |
rick@pcrat.UUCP (Rick Richardson) | Re: RISC vs CISC on Low-End Processors | 11 May 88 03:19:54 GMT |
stuart@cs.rochester.edu (Stuart Friedberg) | Re: negative addresses | 11 May 88 01:53:50 GMT |
david@daisy.UUCP (David Schachter) | Re: Disk drives -- speed of? | 9 May 88 23:38:55 GMT |
sjs@spectral.ctt.bellcore.com (Stan Switzer) | Re: Is the Intel memory model safe from NO-ONE ?!? | 10 May 88 17:13:25 GMT |
ray@micomvax.UUCP (Ray Dunn) | Re: volatile (in comp.lang.c) | 5 May 88 14:16:52 GMT |
bartlett@encore.UUCP (John Bartlett) | Re: SPARC and multiprocessing | 11 May 88 02:32:22 GMT |
bartlett@encore.UUCP (John Bartlett) | Re: virtual cache coherency | 11 May 88 02:51:14 GMT |
przemek@gondor.cs.psu.edu (Przemyslaw Klosowski) | Re: negative addresses | 11 May 88 01:12:27 GMT |
fox@alice.marlow.reuters.co.uk (Paul Fox) | Re: Unix machines for large databases | 10 May 88 17:07:43 GMT |
pavlov@hscfvax.harvard.edu (G.Pavlov) | Re: Unix machines for large databases | 11 May 88 00:42:04 GMT |
jesup@pawl15.pawl.rpi.edu (Randell E. Jesup) | Re: negative addresses | 11 May 88 05:58:41 GMT |
grunwald@uiucdcsm.cs.uiuc.edu | Re: Today's dumb question... | 10 May 88 14:32:00 GMT |
berto@bc-cis.UUCP ( Operations) | Re: Automatic Shutdown | 10 May 88 21:37:17 GMT |
berto@bc-cis.UUCP ( Operations) | Re: Automatic Shutdown | 10 May 88 21:43:12 GMT |
rk@lexicon.UUCP (Bob Kukura) | Re: negative addresses | 11 May 88 12:28:01 GMT |
tomer@TAURUS.BITNET | CRAY COMPUTERS | 11 May 88 06:55:40 GMT |
nevin1@ihlpf.ATT.COM (00704a-Liber) | Re: Universal OS (striving for flexibility) | 12 May 88 00:58:23 GMT |
henry@utzoo.uucp (Henry Spencer) | Re: Is the Intel memory model safe from NO-ONE ?!? | Thu, 12 May 88 16:22:07 GMT |
henry@utzoo.uucp (Henry Spencer) | Re: negative addresses | Thu, 12 May 88 16:29:06 GMT |
henry@utzoo.uucp (Henry Spencer) | virtual I/O | Thu, 12 May 88 16:49:06 GMT |
mash@mips.COM (John Mashey) | Re: RISC a short answer?? | 11 May 88 04:24:19 GMT |
mcdonald@uxe.cso.uiuc.edu | Re: negative addresses | 10 May 88 16:10:00 GMT |
koopman@a.gp.cs.cmu.edu (Philip Koopman) | Re: RISC vs CISC on Low-End Processors | 11 May 88 16:33:30 GMT |
lgy@pupthy2.PRINCETON.EDU (Larry Yaffe) | Re: Today's dumb question... | 10 May 88 22:54:48 GMT |
johnl@ima.ISC.COM (John R. Levine) | Re: volatile (in comp.lang.c) | 11 May 88 16:13:47 GMT |
nather@ut-sally.UUCP (Ed Nather) | Re: negative addresses (really unsigned arithmetic) | 11 May 88 17:23:39 GMT |
hankd@pur-ee.UUCP (Hank Dietz) | Re: Today's dumb question... | 11 May 88 17:06:47 GMT |
jk3k+@andrew.cmu.edu (Joe Keane) | Re: RISC vs CISC on Low-End Processors | 11 May 88 21:44:57 GMT |
asg@pyuxf.UUCP (alan geller) | Re: Is the Intel memory model safe from NO-ONE ?!? | 11 May 88 15:45:10 GMT |
radford@calgary.UUCP (Radford Neal) | Re: negative addresses | 11 May 88 20:06:44 GMT |
dcj%jacksun@Sun.COM (Donald Clark Jackson) | Unsigned arithmetic | 12 May 88 18:14:17 GMT |
Paul_L_Schauble@cup.portal.com | Re: negative addresses | 12 May 88 06:14:09 GMT |
bertil@carola.uucp (Bertil Reinhammar) | Re: Today's dumb question... | 11 May 88 16:33:23 GMT |
crowl@cs.rochester.edu (Lawrence Crowl) | Re: RISC vs CISC on Low-End Processors | 12 May 88 13:32:26 GMT |
rroot@edm.UUCP (uucp) | Re: Is the Intel memory model safe from NO-ONE ?!? | 12 May 88 08:55:18 GMT |
rroot@edm.UUCP (uucp) | Re: Is the Intel memory model safe from NO-ONE ?!? | 12 May 88 09:29:15 GMT |
elg@killer.UUCP (Eric Green) | Re: Is the Intel memory model safe from NO-ONE ?!? | 12 May 88 05:28:27 GMT |
brucek@hpsrla.HP.COM (Bruce Kleinman) | Re: CISC strikes back. | 9 May 88 18:54:14 GMT |
tve@alice.UUCP | Re: negative addresses | 10 May 88 22:24:26 GMT |
johnl@ima.ISC.COM (John R. Levine) | Re: Is the Intel memory model safe from NO-ONE ?!? | 12 May 88 17:12:56 GMT |