Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!decwrl!pyramid!prls!mips!larry
From: larry@mips.UUCP (Larry Weber)
Newsgroups: comp.arch
Subject: Re: Brain-Clogging Decimal (Was: Re: Wirth's challenge (Was Re: RISC))
Message-ID: <1106@gumby.UUCP>
Date: 12 Dec 87 01:28:04 GMT
References: <6901@apple.UUCP> <15782@watmath.waterloo.edu> <1101@quacky.UUCP>
Reply-To: larry@gumby.UUCP (Larry Weber)
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 33

In article <1101@quacky.UUCP> sjc@mips.UUCP (Steve "The" Correll) writes:
>In article <15782@watmath.waterloo.edu>, ccplumb@watmath.waterloo.edu (Colin Plumb) writes:
>	digits		MC68000 instructions 	MIPS R2000 instructions
>	1 		34			28
>	3		39			28
>	5		44			28
>	7		49			28
>	9		54			49
>	11		59			49
>	...
>
Note that these numbers are instruction counts, not cycle counts.  All 68020
instructions take at least 2 cycles (subject to a slight amount of overlap
in the processor).  In fact the ABCD instruction that was used in this example
takes 4 or 5 cycles.  Given equal cycle times on the two machines, you 
would expect a performance difference of 2 to 4 (depending on whether you
are buying or selling).

Of course if you really must use a 68020 and want the best performance,
you should implement an algorithm along the lines of ours and just
ignore the ABCD instruction.  In other words, treat the 68020 like a 
RISC machine.

This is not as absurd as it may sound.  When the 801 group implemented
its PL.8 compiler for the 370 (after making it generate 801 code), they
treated the 370 like a RISC machine and also got better results from the
370.  Lots of people have pointed out that the fastest way to call a subroutine
in a VAX is to NOT use 'calls' (call subroutine).

-- 
-Larry Weber  DISCLAIMER: I speak only for myself, and I even deny that.
UUCP: 	{decvax,ucbvax,ihnp4}!decwrl!mips!larry,   DDD:408-720-1700, x214
USPS: 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086