Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!lll-lcc!pyramid!prls!mips!mash From: mash@mips.UUCP Newsgroups: comp.arch Subject: Re: Horizontal pipelining Message-ID: <1006@winchester.UUCP> Date: Mon, 30-Nov-87 01:42:14 EST Article-I.D.: winchest.1006 Posted: Mon Nov 30 01:42:14 1987 Date-Received: Wed, 2-Dec-87 02:40:13 EST References: <201@PT.CS.CMU.EDU> <388@sdcjove.CAM.UNISYS.COM> Reply-To: mash@winchester.UUCP (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 48 In article <2581@mmintl.UUCP> franka@mmintl.UUCP (Frank Adams) writes: >|That's the critical observation, and observe that an increasing piece >|of the computing spectrum is being dominated by single-chip CPUs, >|whose design tradeoffs are very different from having boards full of >|[TTL, ECL, etc] logic. >This is a good point, but unless I am missing something, it is only a >temporary one. Surely we will reach the point, not too many years from now, >when the logic which now fills many boards will all fit on one chip. At >that point, the arguments for horizontal pipelining on a single chip CPU >will be as strong as they are today for multi-chip CPUs. Won't they? Maybe, maybe not: it seems to me there are packaging issue differences. (I'm not a packaging expert: maybe someone who is will contribute). However, I'd observe that I've seen a lot of multi-board designs that were able to afford to have lots of busses, and there didn't seem to be huge discontinuities in cost when you needed to make something a little bigger, standard form factors notwithstanding. On the other hand, it seems that with VLSI design, at any given point in time: a) Adding pins can lead to big discontinuities in costs. b) # signal pins and/or speeds maybe severely limited by the testers available c) So far, there are obvious good uses for additional pins Maybe cheap, testable packages get big enough sometime that we can have as many pins as we want.... >Another trend which might doom the idea is that towards individual >(single-user) computers. The future of multi-tasking on such machines is >very much in question; if it becomes a big thing, there is no problem. Hopefully, multi-tasking will some year come to single-user computers :-) >Otherwise, we are left the relatively few (but, on average, higher-powered) >time-shared systems which are left. Note: perhaps my earlier posting was not clear enough: let me add some more. I'd said that an increasing part of computing will be taken over by VLSI small-#-of-chip solutions, either in single-cpu units, or in multi-processors. The main reason for this belief wasn't technical, but economic. To make a barrel-style processor economically viable (versus ganging micros together and riding their performance curves at low cost), it needs to have a truly compelling cost/performance advantage. -- -john mashey DISCLAIMER:UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086