Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!linus!philabs!seismo!harpo!utah-cs!sask!hssg40!peachey From: peachey@hssg40.UUCP Newsgroups: net.arch Subject: Re: Cray vs ICs Message-ID: <344@hssg40.UUCP> Date: Wed, 15-Jun-83 09:46:51 EDT Article-I.D.: hssg40.344 Posted: Wed Jun 15 09:46:51 1983 Date-Received: Thu, 16-Jun-83 22:22:22 EDT References: utzoo.3013 Lines: 19 A reason for the lack of MSI/LSI in the Cray-1: Apparently, the Cray-1 is implemented with ECL (emitter-coupled logic). Switching noise is generated when an ECL gate changes from driving a load to not driving a load. However, since most ECL gates have both normal and inverted outputs, it is possible to virtually eliminate switching noise by terminating an equal number of inverted and normal gate outputs. This ensures that as many outputs are changing to logic 1 as are changing to logic 0, which avoids generating power supply spikes. This "balancing" technique was apparently used on the Cray-1. It can be difficult to do this with "off-the-shelf" MSI and LSI components, since some gate outputs within the chip are likely to be unbalanced. Darwyn Peachey utah-cs!sask!hssg40!peachey utcsrgv!sask!hssg40!peachey