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Path: utzoo!linus!genrad!mit-eddi!smh
From: smh@mit-eddi.UUCP (Steven M. Haflich)
Newsgroups: net.arch
Subject: Re: Cray vs ICs, continued
Message-ID: <242@mit-eddi.UUCP>
Date: Wed, 15-Jun-83 02:01:02 EDT
Article-I.D.: mit-eddi.242
Posted: Wed Jun 15 02:01:02 1983
Date-Received: Wed, 15-Jun-83 17:56:56 EDT
References: <3018@utzoo.UUCP> utcsrgv.1531
Lines: 24

Last week I was visited by an old friend who now works in Gallium Arsenide
(GAs) logic research for a large west coast company.  Unless I have my
figures entirely scrambled, he told me that work is proceding on ECL
compatible gate array logic operating at gate delays approaching
50 picoseconds.  (Well, he did admit that the gates were only
probabilistically digital at these speeds, but the bugs were being
worked out.)  In case you have forgotten, 50 picoseconds fits into a
microsecond about 20,000 times!

Anyone who has dabbled in microwaves will realize that such frequencies
give new meanings to terms like "parasitic capacitance" and "transmission
line effects."  When one builds a radio transmitter operating at a mere
couple hundred MHz, one must give careful consideration to the shape
and path of simple conductors connecting circuit elements;  at such
frequencies, there ARE no simple conductors!  Now imagine that the
conductors have to be made of/in epitaxial GAs, and must operate at
two orders of magnitude higher frequency.  It is no coincidence that
my friend got into the GAs business directly from microwave work.

Don't bother asking me for more info -- I have pretty much exhausted
my understanding of the field.  However, it appears that swallowing
IC's will soon be even a worse idea than it is now.

				Steve Haflich, genrad!mit-eddie!smh