Article-I.D.: wdl1.562
Posted: Thu Aug  1 17:21:02 1985
Date-Received: Sun, 4-Aug-85 10:10:18 EDT
Sender: notes@wdl1.UUCP
Organization: Ford Aerospace, Western Development Laboratories
Lines: 15
Nf-ID: #N:wdl1:1400060:000:571
Nf-From: wdl1!jbn    Aug  1 13:09:00 1985


      How long do current EPROMS and EEPROMS hold their memory?  The data
sheets don't say.  Is it temperature dependent?  Humidity dependent?
Five years?  Ten years?  Twenty years?  Are some kinds better than others?
Which ones?  Is lifetime testable?  These things have a finite lifetime;
they're just capacitors.  All those bits out there are slowly leaking away.
How long will they last?

      I'd like to hear from some semiconductor industry people who know what
they are talking about.

				John Nagle
				Ford Aerospace and Communications Corp.
				415-852-4126

Article-I.D.: hp-pcd.6200057
Posted: Mon Aug  5 16:23:00 1985
Date-Received: Mon, 12-Aug-85 00:35:43 EDT
References: <-14000@wdl1.UUCP>
Organization: Hewlett-Packard - Corvallis, OR
Lines: 14
Nf-ID: #R:wdl1:1400060:hp-pcd:6200057:000:421
Nf-From: hp-pcd!john    Aug  5 12:23:00 1985

<<<
<
<      How long do current EPROMS and EEPROMS hold their memory?
<

  The number that I hear most often is 10 years minumum. This means that
if you are using an Altair 8800 with 1702's then you might have to break
down and buy a new computer in the near future. Otherwise you should pull
out the Eproms, copy them into a programmer and reburn them for another
10 years.


John Eaton
!hplabs!hp-pcd!john

Article-I.D.: amdcad.2511
Posted: Fri Aug  9 21:03:36 1985
Date-Received: Mon, 12-Aug-85 05:13:36 EDT
References: <-14000@wdl1.UUCP> <6200057@hp-pcd.UUCP>
Reply-To: phil@amdcad.UUCP (Phil Ngai)
Organization: AMD, Sunnyvale, California
Lines: 17

In article <6200057@hp-pcd.UUCP> john@hp-pcd.UUCP (john) writes:
>if you are using an Altair 8800 with 1702's then you might have to break
>down and buy a new computer in the near future. Otherwise you should pull
>out the Eproms, copy them into a programmer and reburn them for another
>10 years.

1702s? We are encouraging our 27256 customers to upgrade to 27512s!
By the way, has anyone seen the 271024? 16 bit data bus.


-- 
 "Where are all the good men?"
 "I think they're out with all the bad women!"

 Phil Ngai (408) 749-5720
 UUCP: {ucbvax,decwrl,ihnp4,allegra}!amdcad!phil
 ARPA: amdcad!phil@decwrl.ARPA

Article-I.D.: hao.1686
Posted: Sat Aug 10 15:58:12 1985
Date-Received: Wed, 14-Aug-85 01:17:27 EDT
References: <562@wdl1.UUCP>
Organization: High Altitude Obs./NCAR, Boulder CO
Lines: 48

> 
>       How long do current EPROMS and EEPROMS hold their memory? 
Intel states (in their EPROM Applications Manual AFN-01648A) that you will
have 5% cell failures after only 220,000 years at 70C in storage.  This is
from tests taken at high temperatures to accelerate failures.  Assuming that
these failures are linear over time gives a cell failure rate of 0.0001%
in 4.4 years at 70 degrees C.
> The data sheets don't say.
That's because the data sheets are written by lawyers, not engineers.
> Is it temperature dependent?
Failures are accelerated at the rate of one to two orders of magnitude for
each 40 degrees C rise in temperature.  Very very strongly temperature
dependent.  Ever check out hole mobility at 3 degrees Kelvin?  
Humidity dependent?
It would be if the humidity were allowed to get into the chip!  But the
EPROMS are sealed.  Please refer to other reliability reports concerning
the package bonds and seals to get a notion about failures from this cause.
> Five years?  Ten years?  Twenty years?
The more bits you have stored in EPROM, the more likely you are to lose one
of them.  We have some that were programmed over six years ago, and they
still have the right data in them, as near as anyone running the program
can tell, anyway.  :-}))  <-- You can tell this is a MIL spec smile; it has
a double chin.
> Are some kinds better than others?  Which ones?
If you like to drop bits, use ones made before 1980.  If you like to pick
up bits use ones made after 1980.
> Is lifetime testable?
If the semi mfrs think they can test them, then so can you.
> These things have a finite lifetime; they're just capacitors.  All those
> bits out there are slowly leaking away.  How long will they last?
If you want to use five packages for every one needed and compare them
like NASA does shuttle computer decisions, they will still be around and
functioning after you are long gone...  Provided the comparators are still
ok, that is.
> 
>       I'd like to hear from some semiconductor industry people who know what
> they are talking about.
Ooops.  Sorry.  I have no way of knowing if I know what I'm talking about.
I just read the applications data the semiconductor mfrs put out and hope
that *they* know what they are talking about.  So far, it's worked...
> 
> 				John Nagle
> 				Ford Aerospace and Communications Corp.
> 				415-852-4126
								     Howard Hull
[If yet unproven concepts are outlawed in the range of discussion...
                   ...Then only the deranged will discuss yet unproven concepts]
        {ucbvax!hplabs | allegra!nbires | harpo!seismo } !hao!hull

Article-I.D.: kitty.306
Posted: Sun Aug 11 00:23:13 1985
Date-Received: Wed, 14-Aug-85 02:26:12 EDT
References: <-14000@wdl1.UUCP> <6200057@hp-pcd.UUCP> <2511@amdcad.UUCP>
Organization: Recognition Research Corp., Clarence, NY
Lines: 24

> 1702s? We are encouraging our 27256 customers to upgrade to 27512s!
> By the way, has anyone seen the 271024? 16 bit data bus.

	Can AMD *deliver* what it professes to offer?  I recently designed
a product using the AMD 99C88 8Kx8 CMOS static ram because the AMD rep in
my area is also a business associate.  I was promised samples in May - then
June - then July - then maybe 1986 because-the-bottom-has-fallen-out-of-the-
8Kx8-market and AMD was no longer motivated.  I was particularly ticked off
because I had PC boards designed and built for some prototypes - and the AMD
99C88 pinout is different from everyone else's 8Kx8.  Needless to say, I chose
another vendor for the part.
	Also, my sources tell me that the 27512 is a dangerous part to design
around because many other vendors are bypassing it and going directly from the
27256 to the 271014.

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|	Larry Lippman @ Recognition Research Corp., Clarence, New York        |
|	UUCP	{decvax,dual,rocksanne,rocksvax,watmath}!sunybcs!kitty!larry  |
|					    {rice,shell}!baylor!/	      |
|	VOICE	716/741-9185			      syr!buf!/		      |
|	TELEX	{via WUI} 69-71461 ansbak: ELGECOMCLR			      |
|									      |
|	"Have you hugged your cat today?"				      |
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Article-I.D.: sdcrdcf.2257
Posted: Thu Aug 15 16:45:50 1985
Date-Received: Mon, 19-Aug-85 22:32:41 EDT
References: <-14000@wdl1.UUCP> <6200057@hp-pcd.UUCP>
Reply-To: doon@sdcrdcf.UUCP (Harry W. Reed)
Organization: System Development Corp. R+D, Santa Monica
Lines: 22
Summary: 

In article <6200057@hp-pcd.UUCP> john@hp-pcd.UUCP (john) writes:
><<<
><
><      How long do current EPROMS and EEPROMS hold their memory?
><
>
>  The number that I hear most often is 10 years minumum. This means that
>if you are using an Altair 8800 with 1702's then you might have to break
>down and buy a new computer in the near future. Otherwise you should pull
>out the Eproms, copy them into a programmer and reburn them for another
>10 years.
>
>
>John Eaton
>!hplabs!hp-pcd!john


EPROMS retain data indefinately, EEPROMS have the 5-10 Yr. minimum retention
period.

	Harry Reed
	sdcrdcf!doon

Article-I.D.: mtgzz.1043
Posted: Wed Aug 14 12:29:53 1985
Date-Received: Tue, 20-Aug-85 07:42:37 EDT
References: <562@wdl1.UUCP> <1686@hao.UUCP>
Organization: AT&T Information Systems Labs, Middletown NJ
Lines: 48
Cc: dmt

> >       How long do current EPROMS and EEPROMS hold their memory? 
> Intel states (in their EPROM Applications Manual AFN-01648A) that you will
> have 5% cell failures after only 220,000 years at 70C in storage.  This is
> from tests taken at high temperatures to accelerate failures.  Assuming that
> these failures are linear over time gives a cell failure rate of 0.0001%
> in 4.4 years at 70 degrees C.
> ...
>         {ucbvax!hplabs | allegra!nbires | harpo!seismo } !hao!hull

Thanks, Howard. I really enjoyed your response.
Just to put a number on it that's meaningful to me, I used your data
to get a failure rate per chip.  Assuming a 128K chip (current
state-of-the-industry), with the failure of any bit meaning the
chip has failed,  I get an annual failure rate of 2%.
Put another way, the MTBF of the chip is about 50 years.
If I used a 64K chip, it would be more like 100 years.

Implication: as we learn to put more bits on a chip, we'll get
to the point that we need to improve the failure rate per cell
to keep the chips from having an unacceptably high failure rate.
We're probably one order of magnitude from there now. I.e. - a
1 Meg chip would have a mean lifetime of 5 years; that's probably
unacceptable.  A few thoughts on that:
   -	First the bad news - if we do it by higher densities alone,
	we're probably hurting the MTBF, not helping it.  In fact,
	I doubt that the same failure rate per cell should be quoted
	over all PROM from 8K to 128K, but I didn't see the spec sheet.
   -	Now some good news - there's probably a residual factor in
	the MTBF (due to the package, etc.) that prevents failure rate
	from being quite proportional to bits.
   -	Some more good news - if we can put a meg on a chip, we can reclaim
	some of that silicon real estate for an error-correcting code.
	If cell failures are really independent, that should uield a
	big improvement.  
By the way, the independence assumption
is (1) important to the MTBF calculations above, and (2) probably wrong.  
(That is, cell failures on a chip are probably correlated.)  If the
assumption of independence is wrong, then the chip MTBF is better,
and failures are multiple-cell failures (making error-correcting codes
less effective).

....for what it's worth....

			Dave Tutelman
			Physical - AT&T Information Systems
				   Holmdel, NJ 07733
			Logical  - ...ihnp4!mtuxo!mtgzz!dmt
			Audible  - (201)-834-2895

Article-I.D.: othervax.687
Posted: Thu Aug 22 11:58:31 1985
Date-Received: Sun, 25-Aug-85 02:44:06 EDT
References: <562@wdl1.UUCP> <1686@hao.UUCP> <1043@mtgzz.UUCP>
Reply-To: ray@othervax.UUCP (Raymond D. Dunn)
Followup-To: net.micro
Organization: Philips Information Systems - St. Laurent  P.Q., Canada
Lines: 48
Summary: 

In article <1043@mtgzz.UUCP> dmt@mtgzz.UUCP (d.m.tutelman) writes:
>> >       How long do current EPROMS and EEPROMS hold their memory? 
>> Intel states (in their EPROM Applications Manual AFN-01648A) that you will
>> have 5% cell failures after only 220,000 years at 70C in storage.  This is
>> from tests taken at high temperatures to accelerate failures.  Assuming that
                                                                  ^^^^^^^^
>> these failures are linear over time gives a cell failure rate of 0.0001%
   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>> in 4.4 years at 70 degrees C.
>> ...
>>         {ucbvax!hplabs | allegra!nbires | harpo!seismo } !hao!hull
>
>Thanks, Howard. I really enjoyed your response.
>Just to put a number on it that's meaningful to me, I used your data
>to get a failure rate per chip.  Assuming a 128K chip (current
>state-of-the-industry), with the failure of any bit meaning the
>chip has failed,  I get an annual failure rate of 2%.
>Put another way, the MTBF of the chip is about 50 years.
>...
>			Dave Tutelman  ...ihnp4!mtuxo!mtgzz!dmt


Hey! Lets take a look at this...

Assuming that your *computation* of the figures is correct, (and its too
early in the morning for me to delve into probability calculation (:-)),
are you interpreting the figures correctly? 

We are talking about electron leakage from the cells here, so that surely
you *cannot* assume linearity.

As a (made up example), if we assume that the initial charge on all cells is
between 90 and 100% of their maximum, and that they will fail if the charge
drops below 40%, then we have to wait for leakage to drop the cells by 50%
before *any* cell fails.  Now even if the leakage from each cell is at a
different rate, we still have a non-linear failure rate.

Anyway, how does the rate of loss of cell info compare with the failure rate
of the chip itself?  I would have thought that the chance of the chip failing
outright was several orders of magnitude higher than the probability of
getting decayed info from the chip.

Some knowledgable comment would be appreciated.  (A small flame here - please
do not post a response to a request for information if you only *think* you
know the answer (as many did to the original request), this only confuses
the issue - flame off).

Ray Dunn  ..philabs!micomvax!othervax

Article-I.D.: wdl1.649
Posted: Thu Aug 22 20:23:40 1985
Date-Received: Sun, 25-Aug-85 13:14:05 EDT
Sender: notes@wdl1.UUCP
Organization: Ford Aerospace, Western Development Laboratories
Lines: 15
Nf-ID: #R:wdl1:-56200:wdl1:1400065:000:730
Nf-From: wdl1!jbn    Aug 19 11:55:00 1985


      ``EPROMS retain their data indefinitely''.  Wrong.  Fuse-blowing
PROMS may retain their data indefinitely, but the UV-erasable jobs do
eventually discharge.  These are capacitors.
      Also, a random failures per unit time model is incorrect here.
Think of a RC circuit slowly discharging; R is very high but not infinite.
When the stored voltage drops below some threshold, the bit is gone.  
But how long does this take?
      The question is, can we put spare boards with EPROMS in them in dead
storage and expect to use them a decade or two later?  This has implications
for any system with a long lifespan.  Usually we expect the spares to live
longer than the units in use; that may not be true here.

				John Nagle

Article-I.D.: intelca.45
Posted: Tue Aug 27 16:55:18 1985
Date-Received: Fri, 30-Aug-85 00:36:47 EDT
References: <649@wdl1.UUCP>
Organization: Intel, Santa Clara, Ca.
Lines: 22

> 
>       ``EPROMS retain their data indefinitely''.  Wrong.  Fuse-blowing
> PROMS may retain their data indefinitely, but the UV-erasable jobs do

Also wrong, an unfortunate characteristic of programmable devices is
a nasty tendency to grow back fuses after they are blown.  This has
never happened to me personally, but from all the press it gets
(usually in the form that "our fuses have a much better chance of not
growing back than generic manufacturer abc") I would think it to be
somewhat of a problem.  Note that I have never seen a semiconductor
manufacturer boast about how much longer his EPROMs keep their memory
over generic manufacturer abc...
-- 
...and I'm sure it wouldn't interest anybody outside of a small circle
of friends...

Ken Shoemaker, Microprocessor Design for a large, Silicon Valley firm

{pur-ee,hplabs,amd,scgvaxd,dual,qantel}!intelca!kds
	
---the above views are personal.  They may not represent those of the
	employer of its submitter.