Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!pt.cs.cmu.edu!b.gp.cs.cmu.edu!ralf From: ralf@b.gp.cs.cmu.edu (Ralf Brown) Newsgroups: comp.sys.ibm.pc Subject: Re: Mylex vs. Micronics vs. AMI 386 motherboards Message-ID: <6298@pt.cs.cmu.edu> Date: 26 Sep 89 23:44:47 GMT References: <1235@mitisft.Convergent.COM> <22538@cup.portal.com> Organization: Carnegie-Mellon University, CS/RI Lines: 19 In article <22538@cup.portal.com> cliffhanger@cup.portal.com (Cliff C Heyer) writes: }there is supposed to be making a board }with SCSI directly connected to the }CPU bypassing the AT bus...so you can }get "real" I/O up to 900KB/sec rather }than 250KB/sec like all the other Except that the AT bus is not a bottleneck until you get way beyond current disks and controllers. Running at the equivalent of 8 MHz/1 ws with a 16-bit controller, you can pump 5.3 megabytes per second across the bus.... (3 clocks for every 2 bytes, at 125 ns per clock cycle). HD controllers with hardware caches regularly get data transfer rates of over 3 megs per second (and that includes BIOS and other overhead at least once for every 64K transferred). -- {backbone}!cs.cmu.edu!ralf ARPA: RALF@CS.CMU.EDU FIDO: Ralf Brown 1:129/46 BITnet: RALF%CS.CMU.EDU@CMUCCVMA AT&Tnet: (412)268-3053 (school) FAX: ask DISCLAIMER? |"Humor is laughing at what you haven't got when you ought to What's that?| have it." -- Langston Hughes