Path: utzoo!attcan!uunet!ginosko!brutus.cs.uiuc.edu!usc!apple!well!nagle
From: nagle@well.UUCP (John Nagle)
Newsgroups: comp.sys.mac
Subject: Re: Parity vs. non-Parity RAM in the Mac IIci
Message-ID: <13792@well.UUCP>
Date: 24 Sep 89 20:16:07 GMT
References: <0xe23@deimos.cis.ksu.edu> <4004@phri.UUCP>
Reply-To: nagle@well.UUCP (John Nagle)
Lines: 23

In article <4004@phri.UUCP> roy@phri.UUCP (Roy Smith) writes:
>In <0xe23@deimos.cis.ksu.edu> paryavi@harris.cis.ksu.edu (Saiid Paryavi):
>... and the
>memory system as a whole will probably be slower, even if the ram chips
>themselves are the same speed, because of the added parity generation and
>checking required. 

     In general, this isn't the case, and nothing in the Apple data sheets
indicates that there's a speed penalty associated with installing parity
memory in the Mac.  In systems that don't correct errors, most designs
don't hold up delivery of the data on a read until the parity check is
made.  With ECC, it's a different story, since the correction logic has
to delay delivery of the data at least until the check is complete, and
in the presence of errors, perhaps longer.

     The big unanswered question is what happens when a parity error is
detected.  Does the Mac OS properly support the detection hardware, and
if so, what does it do with an error?  Does A/UX support it?  Is there
error logging, as on Sun machines?  It would be good to get field
experience with the error logs, and find out what the real error rates
are.

					John Nagle