Xref: utzoo comp.arch:11592 comp.sys.ibm.pc.rt:1005 Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uwvax!werewolf!luner From: luner@werewolf.CS.WISC.EDU (David L. Luner) Newsgroups: comp.arch,comp.sys.ibm.pc.rt Subject: Re: integer alignment problems on RT Keywords: RT 6150 032 ROMP alignment Message-ID: <8640@spool.cs.wisc.edu> Date: 2 Oct 89 14:06:54 GMT References: <162@eliza.edvvie.at> Sender: news@spool.cs.wisc.edu Reply-To: luner@werewolf.CS.WISC.EDU (David L. Luner) Organization: U of Wisconsin CS Dept Lines: 26 In article <162@eliza.edvvie.at> johnny@edvvie.at (Johann Schweigl) writes: >[... Integers must be word-aligned on an RT...] > >[ ... but not on a '386 ...] >... >This leads me to the final questions: >- is it acceptable that the CPU changes the adress you delivered without any > warning and does something you wouldn't expect >- how do other CPU's behave (eg. 88000, 68000, SPARC, MIPS) >- would you prefer getting an 'alignment violation trap' or something like this >- does any CPU implement such a trap > The full-word alignment restriction is due to the hardware design. The last time I looked at this problem (someone's program was dying with the usual "bus error, core dumped" message), I recall that AIX trapped the error and produced the message (rather than altering the destination address so things worked). It may be that under the current release of AIX the kernel traps the error and patches things so they work, albeit apparently incorrectly. If the is the case, you should report the problem to IBM. The restriction, I am told, is very common for RISC processors. To wit, I believe that SUN SPARCstations have the same "problem". -- David