Path: utzoo!utgpu!watmath!att!ucbvax!bloom-beacon!think!mintaka!daemon From: atheybey@lcs.mit.edu (Andrew Heybey) Newsgroups: comp.sys.amiga.tech Subject: Re: DMA or polling (was Re: GVP controller) Message-ID:Date: 9 Aug 89 13:38:32 GMT References: <8908072207.AA14796@jade.berkeley.edu> <120232@sun.Eng.Sun.COM> Sender: daemon@mintaka.lcs.mit.edu (Lucifer Maleficius) Followup-To: comp.sys.amiga.tech Organization: MIT Laboratory for Computer Science Lines: 26 In-reply-to: raz%kilowatt@Sun.COM's message of 9 Aug 89 00:17:26 GMT In article <120232@sun.Eng.Sun.COM> raz%kilowatt@Sun.COM (Steve -Raz- Berry) writes: Let's look at a typical bus cycle for the GVP or any polled device. First, your device driver has to find out that data is waiting to be transfered, in either a DMA or polled transfer this is likely to be a similar amount of overhead. Secondly the data must be transfered. To do this a polled device has to perform at least three bus cycles. One to fetch the data, two to transfer the data to it's new destination and three to decrement and branch to the top of the loop again. This of course is the absolute minimum for the loop. Sounds like a good argument to me. That said, I've got a GVP and as soon as I can scrape together the cash to buy a drive, I'll even have it installed :-(. *If* GVP's software has this hypothetical tight loop to transfer data, I should be able to win big by installing a 68010, no? Am I all wet? Has anyone disassembled their GVP driver to find out what's going on in there? andrew -- ------------ Andrew Heybey, atheybey@ptt.lcs.mit.edu, uunet!ptt.lcs.mit.edu!atheybey MIT Laboratory for Computer Science Room 509, 545 Technology Square, Cambridge, MA 02139 (617) 253-6011