Path: utzoo!utgpu!watmath!att!dptg!rutgers!iuvax!purdue!tut.cis.ohio-state.edu!pt.cs.cmu.edu!MATHOM.GANDALF.CS.CMU.EDU!lindsay
From: lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay)
Newsgroups: comp.arch
Subject: Re: hardware complex arithmetic support
Keywords: FFT complex arithmetic
Message-ID: <5858@pt.cs.cmu.edu>
Date: 15 Aug 89 16:42:10 GMT
References:  <1672@crdgw1.crd.ge.com>
Organization: Carnegie-Mellon University, CS/RI
Lines: 17

In article <1672@crdgw1.crd.ge.com> davidsen@crdos1.UUCP 
	(bill davidsen) writes:
>Why hasn't anyone built a complex FPU? This seems like a reasonable
>thing to do, in term of being common.

Complex-arithmetic hardware is extremely common, actually. The
most-used Fourier Transform algorithm involves complex arithmetic.
So, FFT boxes have direct hardware support.

The inner loop of the usual FFT involves something called a
"butterfly", which is mostly just a complex multiplication.  The
high-end boxes have a pipelined butterfly unit, containing multiple
floating point units.


-- 
Don		D.C.Lindsay 	Carnegie Mellon School of Computer Science