Newsgroups: comp.arch
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: CISC Microprocessors
Message-ID: <1989Aug13.024341.658@utzoo.uucp>
Organization: U of Toronto Zoology
References: <405@ctycal.UUCP> <3098@scolex.sco.COM> <486@lexicon.com> <427@ctycal.UUCP> <1163@vsi.COM> <560@halley.UUCP>
Date: Sun, 13 Aug 89 02:43:41 GMT

In article <560@halley.UUCP> rrt@halley.UUCP (Robert Teisberg) writes:
>>_Byte_ magazine ran a three-part article on the design of the 6809,
>>and they say that it used random logic.  Written by Terry Ritter and
>>Joel Boney of Moto, it appeared in Jan/Feb/Mar 1979, and it is very
>>good reading.

The only thing I specifically remember from those articles was their
comment about clock speed:  [roughly] "We thought about putting a few
divider stages on the clock input so we could claim victory in the
clock-speed race, but we decided that the users wouldn't appreciate
having to include a tuned cavity as part of the clock oscillator..."
-- 
V7 /bin/mail source: 554 lines.|     Henry Spencer at U of Toronto Zoology
1989 X.400 specs: 2200+ pages. | uunet!attcan!utzoo!henry henry@zoo.toronto.edu