Path: utzoo!utgpu!watmath!att!tut.cis.ohio-state.edu!pt.cs.cmu.edu!cat.cmu.edu!jps
From: jps@cat.cmu.edu (James Salsman)
Newsgroups: comp.arch
Subject: Re: Connection Machine (was: Re: New Bell Award)
Message-ID: <5796@pt.cs.cmu.edu>
Date: 9 Aug 89 09:49:20 GMT
References: <107900005@iuvax> <8953@june.cs.washington.edu> <2238@jhunix.HCF.JHU.EDU>
Organization: Carnegie Mellon
Lines: 24

In article <2238@jhunix.HCF.JHU.EDU> ins_atge@jhunix.UUCP (Thomas G Edwards) writes:

> And just because every processor gets the same instruction feed, one must not
> think that every processor is "doing the same thing." Each CM processor
> can hold an index to an array located in that processor,

Only on the CM-2.  Also, don't forget the condition sense
flag lines of the nanoinstruction stream.

> so with the right software, the CM could become a MIMD machine.  

Please do not attempt this.  I have tried for months to
optimize a MIMD-emulator on the CM-2 with very disappointing
results.  It might be a fun class project for a bunch of
novice hackers learning parallelism.

:James

Disclaimer:  They tell me that I'm not allowed to post to the net
             anymore!  This is totally bogus but if they decide to 
             remove my account, there's nothing I can do about it.  Fascists.
-- 

:James P. Salsman (jps@CAT.CMU.EDU)