Path: utzoo!attcan!uunet!cs.utexas.edu!halley!foghorn.mpd.tandem.com!tjd
From: tjd@foghorn.mpd.tandem.com (Tom Davidson)
Newsgroups: comp.arch
Subject: Re: Cycle Counter
Keywords: Performance
Message-ID: <559@halley.UUCP>
Date: 10 Aug 89 13:35:43 GMT
References:  
Sender: news@halley.UUCP
Distribution: comp
Organization: One of those ex-ETA people....
Lines: 30


>Not that if makes much difference, but the ETA-10 has several extra registers
>to keep track of cycle counts for the vector and scalar units.

Actually, for performance analysis, the ETA10 had some rather useful hardware.
AS John mentions, some "registers" kept such goodies as a clock counter (in
whatever periods the particular cpu was running: 7, 10.5, 19ns etc), vector
unit busy.  It also had 5 programmable counters which could be set to track
such things as
	. number of in stack branches
	. number of branches NOT taken
	. number of times opcode xx was executed
and a whole host of other neat things.  All this could be accesed from a
fortran
program.

These counters were kept on a per-process basis in a state area called an
"invisible package".

Performance analysis and code profiling were made a lot easier with this
type of hardware feature.  I hope h/w architects are doing the same....

Tom



Tom Davidson			internet: halley!foghorn!tjd@cs.utexas.edu 
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