Xref: utzoo comp.arch:7440 comp.unix.questions:10475 Path: utzoo!utgpu!watmath!clyde!att!rutgers!apple!vsi1!wyse!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch,comp.unix.questions Subject: Re: 88K table walk Message-ID: <9173@winchester.mips.COM> Date: 2 Dec 88 23:31:52 GMT References: <415@ncr-sd.SanDiego.NCR.COM> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 12 In article <415@ncr-sd.SanDiego.NCR.COM> jml@ivory.SanDiego.NCR.COM (Michael Lodman) writes: >According to Motorola, the 88200 CMMU does not cache the page and >segment descriptors it fetches during a table walk. This would seem >to me to have a negative impact on performance. Is this standard >practise for table walks, and if not why did Motorola do it that way? >John Mashey, perhaps you could tell me if MIPS does this. Yes. If it's in the cache, it's in the cache. -- -john mashey DISCLAIMER:UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086