Xref: utzoo comp.arch:7508 comp.unix.questions:10597
Path: utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!ncar!noao!asuvax!nud!tom
From: tom@nud.UUCP (Tom Armistead)
Newsgroups: comp.arch,comp.unix.questions
Subject: Re: 88K table walk
Message-ID: <1612@nud.UUCP>
Date: 9 Dec 88 19:08:37 GMT
References: <415@ncr-sd.SanDiego.NCR.COM> <1583@nud.UUCP> <432@ncr-sd.SanDiego.NCR.COM>
Reply-To: tom@nud.UUCP (Tom Armistead)
Organization: Motorola Microcomputer Division, Tempe, Az.
Lines: 10

In article <432@ncr-sd.SanDiego.NCR.COM> jml@ivory.SanDiego.NCR.COM (Michael Lodman) writes:
>In article <1583@nud.UUCP> tom@nud.UUCP (Tom Armistead) writes:
>>    Wrong! The 88200 does cache page descriptors.
>Mr. Armistead of Motorola, please re-read the question and try to answer
>it this time. I'm not asking you if the translated real addresses are
>maintained in the PATC, I'm asking if the data from the two fetches done
>during the table walk are placed in the d/i cache. If not, why not?

    If you want to post my emailed response, you may.  
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