Path: utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!mailrus!cornell!wayner
From: wayner@svax.cs.cornell.edu (Peter Wayner)
Newsgroups: comp.arch
Subject: 88000 and VLIW
Keywords: 88000  VLIW
Message-ID: <23320@cornell.UUCP>
Date: 9 Dec 88 15:33:45 GMT
Sender: nobody@cornell.UUCP
Reply-To: wayner@cs.cornell.edu (Peter Wayner)
Distribution: comp
Organization: Cornell Univ. CS Dept, Ithaca NY
Lines: 9

I understand that the 88000 has a bus on the chip where the
functional units like the ALU and the Floating Point unit
get their information. 

Is this a pre-evolutionary trait of a VLIW chip? Will this
make issuing instructions to multiple alu's easy? 

-Peter Wayner
(wayner@svax.cs.cornell.edu)