Xref: utzoo comp.arch:7468 comp.unix.questions:10510 Path: utzoo!utgpu!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!rutgers!ucsd!ncr-sd!ivory!jml From: jml@ivory.SanDiego.NCR.COM (Michael Lodman) Newsgroups: comp.arch,comp.unix.questions Subject: Re: 88K table walk Message-ID: <432@ncr-sd.SanDiego.NCR.COM> Date: 5 Dec 88 16:48:13 GMT References: <415@ncr-sd.SanDiego.NCR.COM> <1583@nud.UUCP> Sender: news@ncr-sd.SanDiego.NCR.COM Reply-To: jml@ivory.SanDiego.NCR.COM (Michael Lodman) Organization: NCR Corporation - Advanced Development Lines: 19 In article <1583@nud.UUCP> tom@nud.UUCP (Tom Armistead) writes: >In article <415@ncr-sd.SanDiego.NCR.COM> jml@ivory.SanDiego.NCR.COM (Michael Lodman) writes: >>According to Motorola, the 88200 CMMU does not cache the page and >>segment descriptors it fetches during a table walk. > > Wrong! The 88200 does cache page descriptors. Mr. Armistead of Motorola, please re-read the question and try to answer it this time. I'm not asking you if the translated real addresses are maintained in the PATC, I'm asking if the data from the two fetches done during the table walk are placed in the d/i cache. If not, why not? Michael Lodman (619) 485-3335 Advanced Development NCR Corporation E&M San Diego mike.lodman@ivory.SanDiego.NCR.COM {sdcsvax,cbatt,dcdwest,nosc.ARPA}!ncr-sd!ivory!jml When you die, if you've been very, very good, you'll go to ... Montana.