Path: utzoo!attcan!uunet!husc6!ogccse!blake!uw-beaver!mit-eddie!bu-cs!purdue!decwrl!ucbvax!pro-exchange.cts.com!rich From: rich@pro-exchange.cts.com (Rich Sims) Newsgroups: comp.sys.apple Subject: Re: Long and short integers Message-ID: <8811251119.AA18101@crash.cts.com> Date: 25 Nov 88 08:56:09 GMT Sender: daemon@ucbvax.BERKELEY.EDU Reply-To: pnet01!pro-simasd!pro-exchange!rich@nosc.mil Organization: The Internet Lines: 69 in reply to Doug Gwyn (and out of sequence with your comments....) > And a final piece of nonsense. That is about as sexist as one could > imagine. That was *meant* to be somewhat "tongue-in-cheek"... sorry you didn't recognize it as such! > This is nonsense. The 6502 transfers 8 bits of data to/from memory in > parallel. There is no "first" bit, and which is "leftmost" I suppose > depends on whether you're looking into the top of your Apple II from > the left side of the case or the right. I'll go along with that -- from a purely hardware viewpoint (although, I suspect that "front or back of the case" would have been a better selection). In terms of the representation and usage, which is apparently what other folks are dealing with, the statement would seem to be correct. As far as the concept of "first" is concerned, there are a fairly substantial number of independently developed applications which are doing (or rather, allowing the Apple to do) parallel <-> serial conversions, with a reasonably high level of success. There must be *some* sort of "starting point" that's fairly widely accepted as first|leading|initial|whatever you like!! It is also interesting to note that the design specification sheets on both the 6502 and 65816 list instructions which shift bits "left" or "right". I wonder how they do that, if there is no "left" or "right"? > More nonsense. Several 6502 operations involve 16-bit address arithmetic, > and the 65816 has a 16-bit accumulator (and 24-bit addressing). There is > no reason to consider address arithmetic as distinct from accumulator > arithmetic for the 65xx architecture. No? Perhaps I'm mistaken about the internal organization of the chip. I was always under the impression that "address" arithmetic and "data" arithmetic were not only handled differently, but didn't even use the same registers. At least, that's what the references available to me seem to indicate. I understand the 6502's capabilities in the area of address arithmetic, but perhaps you'd be good enough to provide me with a brief example of the same sort of thing using data other than an address... perhaps storing a 16-bit value somewhere with a single instruction, or just incrementing one. By the way, the 'thread' was fairly specific to the 6502, but your comment concerning the 65816's capabilities was correct. I fail to see where it's any different in principle, though. The chip simply has the capability of handling 8 additional bits in either mode. It can't deal with 24 bit data any better than the 6502 can with 16 bit data. > That's an untestable assertion. Infra-byte "bit order" (whatever that > means; have you seen the way RAM is organized?) is not visible to the > programmer. Perhaps not "easily" testable, but certainly not "untestable". I'll agree that it's not "visible" to the programmer, but if it's not consistent, then how do you explain the large number of operations involving bit manipulation that have been carried out correctly over the years? Has everyone just been very lucky? -Rich Sims- UUCP: { sdcsvax nosc } !crash!pro-exchange!rich ARPA: crash!pro-exchange!rich@nosc.mil INET: rich@pro-exchange.cts.com