Path: utzoo!utgpu!attcan!uunet!husc6!bbn!rochester!ur-tut!ur-valhalla!micropen!dave From: dave@micropen (David F. Carlson) Newsgroups: comp.unix.microport Subject: Re: serial ports on the '286 Summary: Not very swift Keywords: uport SV/286 Message-ID: <532@micropen> Date: 12 Aug 88 13:28:27 GMT References: <531@micropen> <4690@b-tech.UUCP> <5909@bigtex.uucp> Organization: Micropen Dirent Writing Systems, Pittsford, NY Lines: 41 In article <5909@bigtex.uucp>, james@bigtex.uucp (James Van Artsdalen) writes: > In article <4690@b-tech.UUCP>, zeeff@b-tech.UUCP (Jon Zeeff) wrote: > > I think serious thought should be given to supporting the NS16550AN. > > This is a plug in replacement for the existing uart that gives you a > > 16 byte fifo. At least the problem would go from "there is nothing > > I believe the part has settable high- and low-water marks also. This > means that it can not only prevent lost characters at high speed (due > to the kernel having interrupts disabled for long periods), but is can > also lessen the system load at high speeds by dramatically cutting the > number of interrupts to be serviced. > The PIC (interrupt controller) doesn't "lose" interrupts, it allows them to be masked long enough that the 1 deep fifo on the 8250 family is overrun. Further interrupt events while a pending interrupt is still flagged does nothing to the CPU but the events that they represent are possibly irrevocably lost. > For example, let's suppose uPort modified the serial driver such that > when the line was put in raw mode, the 16550AN was set to generate an > interrupt every tenth character. The interrupt handler would then get > ten bytes for the overhead of one interrupt, and would still have six > character times to respond to the interrupt. > > James R. Van Artsdalen ...!uunet!utastro!bigtex!james But raw mode is defined (often) to return in *less* than 10 characters. The "win" of the fifo is that overruns are nearly impossible, which allows the driver to make interrupt latency almost a non-issue. Getting in and out of an interrupt routine every 0.5 milliseconds is very tough. Having a kernel timer set up to check serial status every 8 milliseconds (when interrupts have been received recently) is very much easier on the OS as a whole and the fifo guarantees that characters would not be lost. -- David F. Carlson, Micropen, Inc. micropen!dave@ee.rochester.edu "The faster I go, the behinder I get." --Lewis Carroll