Path: utzoo!utgpu!attcan!uunet!lll-winken!lll-tis!helios.ee.lbl.gov!pasteur!ames!mailrus!iuvax!bobmon
From: bobmon@iuvax.cs.indiana.edu (RAMontante)
Newsgroups: comp.sys.ibm.pc
Subject: Re: RAM speed per clock rate
Message-ID: <11431@iuvax.cs.indiana.edu>
Date: 9 Aug 88 14:24:41 GMT
References: <22faf142@ralf> <623@starfish.Convergent.COM>
Reply-To: bobmon@iuvax.UUCP (RAMontante)
Organization: malkaryotic
Lines: 7

Okay, I've seen some interesting RAM-timing information flow past, and I
understand what a wait state does, but I have one simple question:  what
IS a wait state?  Is it a CPU clock cycle?  Is it some portion of a clock
cycle related to the memory-chip timing (what relationship?)?  Does it
come from some mysterious secret delay line somewhere?  What???
-- 
--    bob,mon			(bobmon@iuvax.cs.indiana.edu)
--    "Aristotle was not Belgian..."	- Wanda