Path: utzoo!utgpu!attcan!uunet!husc6!cmcl2!nrl-cmf!ames!killer!pollux!dalsqnt!rpp386!pigs!haugj
From: haugj@pigs.UUCP (Joe Bob Willie)
Newsgroups: comp.sys.m68k
Subject: Re: quad-aligning the 68020 stack
Summary: REALLY BIG BUSSES!
Message-ID: <221@pigs.UUCP>
Date: 10 Aug 88 19:38:23 GMT
References: <2194@uhccux.uhcc.hawaii.edu> <4431@cbmvax.UUCP> <2727@winchester.mips.COM> <4434@cbmvax.UUCP> <1988Aug9.175440.2320@utzoo.uucp>
Reply-To: haugj@pigs.UUCP (Joe Bob Willie)
Organization: Big "D" Oil and Gas
Lines: 17

In article <1988Aug9.175440.2320@utzoo.uucp> henry@utzoo.uucp (Henry Spencer) writes:
}In article <4434@cbmvax.UUCP> ford@kenobi.cts.com (Mike "Ford" Ditto) writes:
}>                            I can't imagine...
}>an object-code-compatible chip with a wider-than-32-bits data bus.
}
}Why not?  It wouldn't be as big a win as the jump from 16 to 32, but for
}caches in particular, wider is better in memory buses.  I wouldn't be at
}all surprised to see the 68050 or whatever with a 64-bit memory bus.

me, i'm holding out for when motorola creates a cray zmp compatible chip
with a 256 bit wide bus.  i've been aligning everything, including 
character data on 256 bit boundaries.  the performance improvement should
be astounding in three or four years!
-- 
 jfh@rpp386.uucp	(The Beach Bum at The Big "D" Home for Wayward Hackers)
     "Never attribute to malice what is adequately explained by stupidity"
                -- Hanlon's Razor