Path: utzoo!attcan!uunet!husc6!think!ames!vsi1!wyse!mips!sah
From: sah@mips.COM (Steve Hanson)
Newsgroups: comp.arch
Subject: Re: separate integer and float register
Message-ID: <2807@gumby.mips.COM>
Date: 16 Aug 88 14:51:10 GMT
References: <2724@wright.mips.COM> <6800002@modcomp>
Reply-To: sah@gumby.UUCP (Steve Hanson)
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 26


>
>>... what were the tradeoffs that went into the decision to make the
>>floating point and integer registers the same?
In article <6800002@modcomp> joe@modcomp.UUCP writes:
>
>Special floating point registers also slow down context switching, due
>to the extra time needed to save/restore them.  This can be an important
>factor in real-time or communication applications that have high context
>switch rates.



	Real-time executives should only save floating point context
for processes that use the FPU. For example, for the MIPS R2000 you
would simply disable the FPU prior to a context switch and only save
floating point context for the last FPU owner if you get a coprocessor
unusable exception. A coprocessor unusable exception occurs due to an
attempt to execute a coprocessor instruction when the corresponding
coprocesor unit has not been marked usable. Variations of this game
are also available for other processors.


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