Path: utzoo!attcan!uunet!mcvax!enea!diab!pf From: pf@diab.se (Per Fogelstr|m) Newsgroups: comp.arch Subject: Re: Sw vs. Hw BitBlit. Message-ID: <412@ma.diab.se> Date: 9 Aug 88 07:28:56 GMT References: <399@ma.diab.se> <1988Jul28.173301.7275@utzoo.uucp> <840@stride.Stride.COM> Reply-To: pf@ma.UUCP (Per Fogelstr|m) Organization: Diab Data AB, Taby, Sweden Lines: 21 In article <840@stride.Stride.COM> mitch@stride.stride.com.UUCP (Thomas Mitchell) writes: >.......................... Many 'DMA' processors are not >as fast as the main processor. They commonly do not have, a >bus interface equal to the processor or instruction cache or other >goodies we now expect in a micro-processor. > >If I was careful -- I use the words DMA processor and not DMA >device. It is possible to build custom hardware (a device) that >does DMA to or from main memory vastly faster than a 'programed' >transfer but such things are today rare. As a matter of fact, modern busses, supporting more than 100Mb transfer rate migth saturate the processor. :-))) Okay, okay, lets be serious. What i mean is that there is no need for what was called a DMA procecssor back in the good o'l days. DMA channels was needed because the main proceesor couldn't handle the data rate from Mag tapes and disks, etc. What is needed today in multiprocessor systems is a mechanism wich allows the "programmed CPU" on the disk controller board to burst the data over the bus fast as H..L. This to obey the rules for multi-procesor buses: 1. Don't use the bus. 2. If you must, be fast. 3. To be fast transfer more data than addresses. e.g use block transfers.