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From: agn@unh.cs.cmu.edu (Andreas Nowatzyk)
Newsgroups: sci.electronics
Subject: Re: Vero-wire circuit prototyping system
Keywords: vero wire prototype
Message-ID: <2203@pt.cs.cmu.edu>
Date: 8 Jul 88 06:12:28 GMT
References: <187@lithium.kcl-cs.UUCP>
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Organization: Carnegie-Mellon University, CS/RI
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I used Vero-wire and a similar technology distributed by Siemens for a
system with more than 1000 standart TTL chips (arround 1978!) running
at 10 Mhz. No problem. However, using today's faster logics (F, AS,...)
will cause problems. All wires run in rather crowded channels and
cross-talk becomes a problem. Also, you have to have reasonably good
solder skills. PWR and GND must be dealt with by other means. Also,
this method is not as fast as wire-wraping, but way cheaper.

  --  Andreas

-- 
   --  Andreas Nowatzyk  (DC5ZV)

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