Path: utzoo!utgpu!water!watmath!clyde!att!osu-cis!tut.cis.ohio-state.edu!bloom-beacon!mit-eddie!ll-xn!ames!pasteur!ucbvax!decwrl!spar!snjsn1!bilbo!greg
From: greg@bilbo (Greg Wageman)
Newsgroups: comp.sys.atari.st
Subject: Re: Making Magic Sac compatible with 128K Roms
Message-ID: <318@snjsn1.SJ.ATE.SLB.COM>
Date: 13 Jul 88 21:40:51 GMT
References: <1988Jul12.201345.24692@gpu.utcs.toronto.edu> <4132@saturn.ucsc.edu>
Sender: news@SJ.ATE.SLB.COM
Reply-To: greg%sentry@spar.slb.com (Greg Wageman)
Organization: Schlumberger ATE, San Jose, CA
Lines: 32

In article <4132@saturn.ucsc.edu> koreth@ucscb.UCSC.EDU (Froot-Loops Addict) writes:
>In article <1988Jul12.201345.24692@gpu.utcs.toronto.edu> lharris@gpu.utcs.toronto.edu (Leonard Harris) writes:
>>Does anyone have any info on patching magic sac to the 128K roms.
>[deleted]
>>Technically there should be no problem.
>
>I believe there is a technical problem, actually.  Isn't the cartridge's
>address bus only 16 bits wide?  If so, that places a 64K limit on the size
>of cartridge software, unless some fancy footwork (a la OSS's SuperCartridges
>on the 8-bit) is done to increase the effective space.  And said footwork
>isn't trivial, as far as I know.  Of course, I'm not a hardware person, so
>this could be totally bogus.

True, the address bus is only 16 bits wide (15, actually, with Upper
Data Strobe and Lower Data Strobe providing the High/Low byte info, as
well as doubling as the Data Strobe).  However, there are two
additional lines called "ROM Select 3" and "ROM Select 4" which become
active when the addresses 0xFB000-0xFBFFFF and 0xFA0000-0xFAFFFF,
respectively, are read.  This gives access to 64K bytes x 2 = 128K
bytes, just enough for the ROMS, but no room for the clock as in the
64K byte Magic Sac.



Greg Wageman             	ARPA: greg%sentry@spar.slb.com
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