Path: utzoo!utgpu!water!watmath!clyde!bellcore!faline!thumper!ulysses!andante!mit-eddie!bu-cs!buengc!bph
From: bph@buengc.UUCP
Newsgroups: comp.lsi
Subject: Updating Re: memories
Message-ID: <409@buengc.BU.EDU>
Date: 12 Jul 88 19:03:57 GMT
References:  <391@buengc.BU.EDU>
Reply-To: bph@buengc.bu.edu (Blair P. Houghton)
Followup-To: comp.lsi
Organization: Boston Univ. Col. of Eng.
Lines: 24

In article <391@buengc.BU.EDU> bph@buengc.bu.edu (Blair P. Houghton) writes:
>In article  grzybows@math.rutgers.edu (grzybowski) writes:
>>
>>What about really high capacity memories?
>
>Look up "Bloch Line Memory" in current and ancient literature.
>
>I heard about it only a few months ago, and the guy who gave the seminar
>said something about 300Meg per chip; 'course, your mileage may vary :-)
>

Okay, I looked it up.  The stuff is really called "vertical Bloch line
memory."  It's 250M bits-per-square-cm, which comes to roughly 30Mbyte
chips.  Access time is 1240M bits-per-second, or roughly 1ms to find
the thing you want.

Now the bad news:  I forgot to write the guy's name down, and I didn't
get the handout.  Aaack!  Now I gotta go look in the SCI!

					--Blair
					"No, really, I like the SCI,
					even if it doesn't auto-pluralize...
					Now, Can You Please Resume Spelling
					My Name Correctly?"