Path: utzoo!attcan!uunet!nbires!ncar!boulder!sunybcs!ugdill From: ugdill@sunybcs.UUCP (Peter Dill) Newsgroups: comp.sys.amiga Subject: Re: Ideas for New Custom Chips Summary: See the net.article; its an object but it represents the Living... Message-ID: <12324@sunybcs.UUCP> Date: 30 Jun 88 21:04:05 GMT References: <3128@polya.Stanford.EDU> <1566@eneevax.UUCP> Reply-To: ugdill@sunybcs.UUCP (Peter Dill) Organization: SUNY/Buffalo Computer Science and Scalp Cleanser Lines: 43 >(Tomas G. Rokicki) writes: >In order for the Amiga to compete in the current marketplace, the >machine should have at *least* the following features: > > * 4096 color registers, 16 million colors > * 2048x2048 resolution, non-interlaced, on a standard TV > * 12 blitters, one for each of 12 planes > * 88000 CPU, w/ 68020 emulation as fast as the 68020 > * Matrix and clipping hardware built in > * 44Khz sampling rate, 16-bit DAC's on four channels > * Each channel with AM, FM synthesis and enveloping > * 16M memory standard, expandable to 4G > * Built-in ST506, SCSI, EDSI, fast HPIB interfaces > * At least four serial ports, capable of 2Mbaud > * Built-in Ethernet port > * A price under $1000 I don't know if this can be implemented in the current bus design, but how about a great big, fat, bourgeois custom cache/mmu chip|s that was hit by the cpu and all coprocessors before going to memory. This would solve the problem of cache coherency for the custom chips, increase the appearent speed of all the chips (hopefully economically) and give us another chip to name. I like either "Chastity" or "Prudence". And VM would be nice too. &( Peter Dill) == v114nj32@ubvms.cc.buffalo.edu | "As a rule of course, we just ugdill@joey.cs.buffalo.edu |don't care ." ..!{nike|watmath,alegra,decvax}!sunybcs!ugdill|- Logical Design of Digital | Circuits | C.M.Reeves --------------------------------------------------------------------------------