From | Subject | Date |
---|---|---|
steckel@Alliant.COM (Geoff Steckel) | Re: More On Write-Only Control Registers | 20 Jun 88 16:51:12 GMT |
kds@blabla.intel.com (Ken Shoemaker) | Re: RISC machines and scoreboarding | 21 Jun 88 01:03:55 GMT |
jmd@granite.dec.com (John Danskin) | Memory latency / cacheing / scientific programs | 21 Jun 88 22:03:23 GMT |
srg@quick.COM (Spencer Garrett) | Re: Why no disks with two HDAs ? | 22 Jun 88 08:25:35 GMT |
cprice@mips.COM (Charlie Price) | Re: Why no disks with two HDAs ? | 22 Jun 88 05:44:09 GMT |
colwell@mfci.UUCP (Robert Colwell) | Re: Memory latency / cacheing / scientific programs | 22 Jun 88 13:07:42 GMT |
colwell@mfci.UUCP (Robert Colwell) | Re: several concurrent memory ops | 22 Jun 88 13:20:17 GMT |
johng@ecrcvax.UUCP (John Gregor) | Re: Lightning Fast Photonic Optical Computers | 21 Jun 88 11:59:31 GMT |
stevew@nsc.nsc.com (Steve Wilson) | Re: pad grid package | 22 Jun 88 16:07:01 GMT |
rjhellinga@ccng.waterloo.edu (Richard Hellinga) | microprocessor dates and technology | 23 Jun 88 18:08:08 GMT |
darin@nova.laic.uucp (Darin Johnson) | Re: The VAX Always Uses Fewer Instructions | 22 Jun 88 16:40:04 GMT |
dorourke@polyslo.UUCP (David O'Rourke) | Re: stack machines (Burroughs) | 22 Jun 88 17:29:49 GMT |
radford@calgary.UUCP (Radford Neal) | Re: More On Write-Only Control Registers | 23 Jun 88 01:38:18 GMT |
tom@nud.UUCP (Tom Armistead) | Re: RISC machines and scoreboarding | 22 Jun 88 15:56:08 GMT |
tom@nud.UUCP (Tom Armistead) | Re: RISC machines and scoreboarding | 22 Jun 88 16:12:22 GMT |
tom@nud.UUCP (Tom Armistead) | Re: RISC machines and scoreboarding | 22 Jun 88 16:43:24 GMT |
tom@nud.UUCP (Tom Armistead) | Re: RISC machines and scoreboarding | 22 Jun 88 18:13:50 GMT |
eric@snark.UUCP (Eric S. Raymond) | Re: Compiler complexity (was: VAX Always Uses Fewer Instructions) | 23 Jun 88 11:02:36 GMT |
lisper-bjorn@CS.YALE.EDU (Bjorn Lisper) | Re: Info wanted on eniac computers | 21 Jun 88 01:47:07 GMT |
cprice@mips.COM (Charlie Price) | Re: Why no disks with two HDAs ? | 21 Jun 88 04:31:22 GMT |
root@didsgn.UUCP (didsgn) | Re: Why no disks with two HDAs ? | 18 Jun 88 12:43:14 GMT |
aglew@urbsdc.Urbana.Gould.COM | Re: m88000 benchmarks (and C vs ASM | 20 Jun 88 16:07:00 GMT |
aglew@urbsdc.Urbana.Gould.COM | Re: RISC machines and scoreboarding | 20 Jun 88 16:13:00 GMT |
aglew@urbsdc.Urbana.Gould.COM | Re: m88000 benchmarks (and C vs ASM | 20 Jun 88 16:16:00 GMT |
webber@porthos.rutgers.edu (Bob Webber) | [Wrt Zuse] Re: Info wanted on eniac computers | 21 Jun 88 13:21:51 GMT |
chris@softway.oz (Chris Maltby) | Re: The VAX Always Uses Fewer Instructions | 21 Jun 88 04:12:39 GMT |
jim@belltec.UUCP (Mr. Jim's Own Logon) | Re: Intel announces P9 as 80386SX | 20 Jun 88 14:28:19 GMT |
samples@dougfir.Berkeley.EDU (A. Dain Samples) | Re: Compiler complexity (was: VAX Always Uses Fewer Instructions) | 20 Jun 88 19:39:57 GMT |
darrylo@hpsrli.HP.COM (Darryl Okahata) | Re: Re: Re: null pointers (was: negative addresses) | 20 Jun 88 16:06:23 GMT |
mce@tc.fluke.COM (Brian McElhinney) | Re: RISC machines and scoreboarding | 21 Jun 88 15:47:30 GMT |
stevew@nsc.nsc.com (Steve Wilson) | Re: More On Write-Only Control Registers | 21 Jun 88 16:13:56 GMT |
lindsay@k.gp.cs.cmu.edu (Donald Lindsay) | pad grid package | 21 Jun 88 15:35:40 GMT |
smryan@garth.UUCP (Steven Ryan) | Re: m88000 benchmarks (and C vs ASM | 21 Jun 88 21:05:34 GMT |
jesup@cbmvax.UUCP (Randell Jesup) | Re: m88000 benchmarks (and C vs ASM | 22 Jun 88 17:11:09 GMT |
hoefling@uicsrd.csrd.uiuc.edu | Re: Re: Re: null pointers (was: neg | 20 Jun 88 17:11:00 GMT |
baum@Apple.COM (Allen J. Baum) | Re: More On Write-Only Control Registers | 22 Jun 88 19:58:45 GMT |
tim@amdcad.AMD.COM (Tim Olson) | Re: RISC machines and scoreboarding | 23 Jun 88 21:08:44 GMT |
jesup@cbmvax.UUCP (Randell Jesup) | Re: The VAX Always Uses Fewer Instructions | 23 Jun 88 19:41:49 GMT |
webber@porthos.rutgers.edu (Bob Webber) | Optimizing Assemblers (was: Re: The VAX Always Uses ...) | 24 Jun 88 01:34:46 GMT |
lindsay@k.gp.cs.cmu.edu (Donald Lindsay) | Re: Memory latency / cacheing / scientific programs | 24 Jun 88 02:24:10 GMT |
mslater@cup.portal.com | Re: pad grid package | 23 Jun 88 02:21:28 GMT |
bct@its63b.ed.ac.uk (B Tompsett) | Re: Info wanted on eniac computers | 23 Jun 88 16:16:55 GMT |
freuden@mfci.UUCP (Stefan Freudenberger) | Re: Memory latency / cacheing / scientific programs | 24 Jun 88 13:51:21 GMT |
walter@garth.UUCP (Walter Bays) | Re: several concurrent memory ops | 24 Jun 88 08:25:08 GMT |
rick@svedberg.bcm.tmc.edu (Richard H. Miller) | Re: Why no disks with two HDAs ? | 24 Jun 88 16:40:30 GMT |
jlg@beta.lanl.gov (Jim Giles) | Re: The VAX Always Uses Fewer Instructions | 24 Jun 88 15:53:49 GMT |
tom@nud.UUCP (Tom Armistead) | Re: RISC machines and scoreboarding | 24 Jun 88 17:37:21 GMT |
farren@gethen.UUCP (Michael J. Farren) | Re: Info wanted on eniac computers | 24 Jun 88 10:13:18 GMT |
jay@splut.UUCP (Jay "you ignorant splut!" Maynard) | Re: Why no disks with two HDAs ? | 25 Jun 88 16:53:54 GMT |
rwa@auvax.UUCP (Ross Alexander) | Re: Compiler complexity (was: VAX Always Uses Fewer Instructions) | 26 Jun 88 01:04:41 GMT |
earl@mips.COM (Earl Killian) | Re: RISC machines and scoreboarding | 25 Jun 88 15:25:09 GMT |
mash@mips.COM (John Mashey) | Re: RISC machines and scoreboarding | 25 Jun 88 23:40:29 GMT |
smryan@garth.UUCP (Steven Ryan) | Re: The VAX Always Uses Fewer Instructions | 25 Jun 88 21:28:11 GMT |
roginski@ogcvax.ogc.edu (Krist Roginski) | Definition of "imprecise interrupt" | 24 Jun 88 02:41:55 GMT |
smryan@garth.UUCP (Steven Ryan) | Re: Memory latency / cacheing / scientific programs | 25 Jun 88 00:23:48 GMT |
scott@hpcvca.HP.COM (Scott Linn) | Re: Intel announces P9 as 80386SX | 23 Jun 88 19:59:00 GMT |
mash@mips.COM (John Mashey) | Re: The VAX Always Uses Fewer Instructions | 25 Jun 88 20:43:10 GMT |
mash@mips.COM (John Mashey) | Re: The VAX Always Uses Fewer Instructions [really: optimizing asms] | 26 Jun 88 16:16:34 GMT |
mch@computing-maths.cardiff.ac.uk (Major Kano) | Goodbye (for now) ! | 22 Jun 88 16:33:13 GMT |
scc@cl.cam.ac.uk (Stephen Crawley) | Re: Info wanted on eniac computers | 25 Jun 88 00:54:48 GMT |
jmd@granite.dec.com (John Danskin) | Re: Memory latency / cacheing / scientific programs | 27 Jun 88 17:56:22 GMT |
markhall@pyramid.pyramid.com (Mark Hall) | Re: m88k memory stalls (was: RISC machines and scoreboarding) | 27 Jun 88 15:12:28 GMT |
grunwald@uiucdcsm.cs.uiuc.edu | Gemini | 27 Jun 88 02:45:00 GMT |
chris@mimsy.UUCP (Chris Torek) | Re: m88000 benchmarks | 27 Jun 88 17:44:45 GMT |
colwell@mfci.UUCP (Bob Colwell) | Re: Memory latency / cacheing / scientific programs | 28 Jun 88 02:12:49 GMT |
chris@mimsy.UUCP (Chris Torek) | Re: `RISC-based' | 29 Jun 88 01:23:52 GMT |
chris@mimsy.UUCP (Chris Torek) | Re: The VAX Always Uses Fewer Instructions | 28 Jun 88 00:32:43 GMT |
duckass%whitney@Sun.COM (David Chenevert) | IBM RISC patents - long | 28 Jun 88 04:41:21 GMT |
smryan@garth.UUCP (Steven Ryan) | Re: The VAX Always Uses Fewer Instructions [really: optimizing asms] | 27 Jun 88 23:27:54 GMT |
eugene@pioneer.arpa (Eugene N. Miya) | 1 TFLOP Tally | 28 Jun 88 01:35:39 GMT |
dik@cwi.nl (Dik T. Winter) | Re: m88000 benchmarks | 28 Jun 88 01:05:30 GMT |
gelsey@convex.UUCP | Re: More On Write-Only Control Register | 21 Jun 88 22:53:00 GMT |
colwell@mfci.uunet | Re: The VAX Always Uses Fewer Instructions | 28 Jun 88 12:45:21 GMT |
hermann@calgary.UUCP (Michael Hermann) | Request for simulation packages | 27 Jun 88 19:22:20 GMT |
ron@mucmot.UUCP (Ron Voss) | Re: RISC machines and scoreboarding | 28 Jun 88 09:08:20 GMT |
webber@porthos.rutgers.edu (Bob Webber) | Clippinger-modified ENIAC and June 48 Manchester Mark I (was: Info...) | 28 Jun 88 13:58:45 GMT |
amos@taux01.UUCP (Amos Shapir) | Re: IBM RISC patents | 28 Jun 88 14:02:08 GMT |
chris@mimsy.UUCP (Chris Torek) | no-branch 68000 signum, min, max | 29 Jun 88 01:16:31 GMT |
smryan@garth.UUCP (Steven Ryan) | Superoptimiser. | 28 Jun 88 21:00:17 GMT |
jesup@cbmvax.UUCP (Randell Jesup) | Re: IBM RISC patents | 29 Jun 88 02:15:49 GMT |
eugene@pioneer.arpa (Eugene N. Miya) | Re: Memory latency / cacheing / scientific programs | 28 Jun 88 21:19:17 GMT |
colwell@mfci.UUCP (Bob Colwell) | Re: RISC machines and scoreboarding | 29 Jun 88 02:09:25 GMT |
andrew@frip.gwd.tek.com (Andrew Klossner) | Re: m88k memory stalls (was: RISC machines and scoreboarding) | 28 Jun 88 16:04:15 GMT |
lamaster@ames.arc.nasa.gov (Hugh LaMaster) | Re: Memory latency / cacheing / scientific programs | 29 Jun 88 16:07:16 GMT |
lamaster@ames.arc.nasa.gov (Hugh LaMaster) | Re: Memory latency / cacheing / scientific programs | 29 Jun 88 16:18:11 GMT |
jbuck@epimass.EPI.COM (Joe Buck) | Re: IBM RISC patents | 29 Jun 88 22:42:13 GMT |
phil@osiris.UUCP (Philip Kos) | Re: RISC machines and scoreboarding | 29 Jun 88 14:39:07 GMT |
mslater@cup.portal.com | Re: Gemini | 29 Jun 88 04:02:02 GMT |
tom@nud.UUCP (Tom Armistead) | Re: RISC machines and scoreboarding | 29 Jun 88 18:23:09 GMT |
schuh@shorty.CS.WISC.EDU (Dan Schuh) | Re: IBM RISC patents (binary and decimal #'s) | 29 Jun 88 21:44:58 GMT |
khearn@pyrglass (Keith Hearn) | Re: IBM RISC patents | 29 Jun 88 18:14:12 GMT |
tom@nud.UUCP (Tom Armistead) | Re: RISC machines and scoreboarding | 29 Jun 88 18:55:48 GMT |
lamaster@ames.arc.nasa.gov (Hugh LaMaster) | Re: Memory latency / cacheing / scientific programs | 30 Jun 88 00:22:53 GMT |
chuck@amdahl.uts.amdahl.com (Charles Simmons) | Re: Superoptimiser. | 29 Jun 88 23:24:56 GMT |
firth@sei.cmu.edu (Robert Firth) | Re: Memory latency / cacheing / scientific programs | 29 Jun 88 19:48:40 GMT |
guy@gorodish.Sun.COM (Guy Harris) | Re: RISC machines and scoreboarding | 30 Jun 88 01:42:25 GMT |
scott@award.UUCP (Scott Smith) | Re: Re: Re: null pointers (was: negative addresses) | 21 Jun 88 23:39:24 GMT |
webber@aramis.rutgers.edu (Bob Webber) | Re: Clippinger-modified ENIAC and June 48 Manchester Mark I (was: Info...) | 30 Jun 88 08:56:25 GMT |
mash@mips.COM (John Mashey) | Re: The VAX Always Uses Fewer Instructions | 30 Jun 88 08:11:04 GMT |
mash@mips.COM (John Mashey) | Re: RISC machines and scoreboarding | 30 Jun 88 08:31:43 GMT |
lamaster@ames.arc.nasa.gov (Hugh LaMaster) | Re: Memory latency / cacheing / scientific programs | 1 Jul 88 00:36:49 GMT |
hankd@pur-ee.UUCP (Hank Dietz) | Re: Memory latency / cacheing / scientific programs | 30 Jun 88 18:34:03 GMT |
guy@gorodish.Sun.COM (Guy Harris) | Re: null pointers (was: negative addresses) | 1 Jul 88 00:02:35 GMT |
chris@mimsy.UUCP (Chris Torek) | getting rid of branches | 30 Jun 88 21:43:22 GMT |
chris@mimsy.UUCP (Chris Torek) | Re: Memory latency / cacheing / scientific programs | 30 Jun 88 21:49:19 GMT |
chris@mimsy.UUCP (Chris Torek) | Re: null pointers (was: negative addresses) | 30 Jun 88 22:02:40 GMT |
chris@mimsy.UUCP (Chris Torek) | VAX 8??? vs Motorola 88000 | 30 Jun 88 22:08:10 GMT |
tak@lfcs.ed.ac.uk (Tom Kean) | What can you do with a 1 million gate EPLD. | 30 Jun 88 18:10:24 GMT |
igp@camcon.uucp (Ian Phillipps) | Eternal RISC v CISC (was Re: The VAX Always Uses Fewer Instructions) | 30 Jun 88 08:22:51 GMT |
earl@mips.COM (Earl Killian) | Re: RISC machines and scoreboarding | 1 Jul 88 02:14:13 GMT |
earl@mips.COM (Earl Killian) | Re: RISC machines and scoreboarding | 1 Jul 88 02:47:01 GMT |