Path: utzoo!utgpu!water!watmath!clyde!bellcore!rutgers!ucsd!ucbvax!decwrl!pyramid!prls!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.unix.wizards Subject: Re: Vax 11/780 performance vs Sun 4/280 performance Message-ID: <2298@winchester.mips.COM> Date: 5 Jun 88 16:41:10 GMT References: <14968@brl-adm.ARPA> <601@modular.UUCP> <7331@swan.ulowell.edu> <2282@rpp386.UUCP> <3859@lynx.UUCP> Reply-To: mash@winchester.UUCP (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 21 In article <3859@lynx.UUCP> m5@lynx.UUCP (Mike McNally) writes: ... >As a somewhat related side question, what does the Sun 4/SPARC MMU look >like? Are lookaside buffer reloads done in software like on the MIPS >R[23]000? (Is that really true about the R[23]000 anyhow?) The Sun-4 MMU, like earlier Suns, doesn't use a TLB, but has SRAMs for memory maps (16 contexts' worth, compared to 8 in Sun-3/200, for example). The R[23]000 indeed do TLB-miss refill handling in software; this is not unusual in RISC machines: HP Precision and AMD 29K (at least) do this also. The overall cost if typically 1% or less of CPU time, which is fairly competitive with hardware refill, especially since one of the larger costs on faster machines is the accumulated cache-miss penalty for fetching PTEs from memory. -- -john mashey DISCLAIMER:UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086