Path: utzoo!utgpu!water!watmath!clyde!att!rutgers!rochester!pt.cs.cmu.edu!sei!sei.cmu.edu!firth From: firth@sei.cmu.edu (Robert Firth) Newsgroups: comp.arch Subject: Re: 88k register sets? Message-ID: <5689@aw.sei.cmu.edu> Date: 1 Jun 88 19:55:48 GMT References: <631@necis.UUCP> Sender: netnews@sei.cmu.edu Reply-To: firth@bd.sei.cmu.edu.UUCP (Robert Firth) Distribution: na Organization: Carnegie-Mellon University, SEI, Pgh, Pa Lines: 31 In article <631@necis.UUCP> smv@necis.UUCP (Steve Valentine) writes: >In the 4/28/88 issue of Electronics on pg. 86, 2nd column there is a paragraph >which reads as follows: > >"Features of the 88000 that suit it to use as a server include its register- >scoreboarding capability, which makes it possible to for the system to switch >from one task to another (called a context switch) in one clock cycle. To do >this, the 88100 chip has duplicate sets of CPU registers used by different >tasks running concurrently in the system. Switching from one task to >another requires only a change in register sets." (a) I don't see what register scoreboarding has to do with task context switching. Register scoreboarding allows the instruction immediately after a load to reference the load target, even with a load delay, by forcing a pause in the execution sequence. This is indeed a feature of the MC88000. (b) I've looked again, very carefully, through the MC88100 Technical Summary (Motorola ref BR588/D of April 1988), and can find no reference to duplicate sets of CPU registers. There is a set of virtual "shadow" registers whose main purpose is to allow precise hardware traps, but this again has nothing to do with task context switches. (c) As best I can tell, a complete context switch requires the save and restore of the equivalent of 64 32-bit registers; however, the description of the "Supervisor programming model" leaves unclear how much of this is necessary under what circumstances. A simple cooperative synchronization point seems to require about 15 regs to be saved and restored, if the Motorola codegeneration conventions are followed.