Path: utzoo!utgpu!water!watmath!clyde!bellcore!faline!thumper!ulysses!andante!mit-eddie!uw-beaver!tektronix!reed!kamath From: kamath@reed.UUCP Newsgroups: comp.sys.apple Subject: Re: BITNET mail follows (No-Slot clock question) Message-ID: <9450@reed.UUCP> Date: 4 Jun 88 18:56:02 GMT References: <8806011115.aa08363@SMOKE.BRL.ARPA> Reply-To: kamath@reed.UUCP (Sean Kamath) Organization: Reed College, Portland OR Lines: 27 In article <8806011115.aa08363@SMOKE.BRL.ARPA> HEINEKEN@MTUS5.BITNET writes: >From: Steve King HEINEKEN at MTUS5 > >Speaking of the no-slot clock, is this messed up in any way by the addidtion >of an accelerator board or the Zip Chip? Does it generate its timing >internally (as would be sensible) or does it just count pulses of the system >clock (in which case an accelerator might make it run fast...) > > --Steve King > HEINEKEN @ MTUS5 The clock does indeed have it's own oscillator. All that need be done is access the data lines with the correct timing and sequence. Since the CPU thinks it's a ROM (With usually 450 ns access time), this isn't a problem. I still haven't figured out why it didn't work with my other //e and 65802. Note that if it *ddid* run off the system clock, it would not make any difference, as accelerator cards and the chips do their own timing, not muck with the system clock (which would be a *REALLY* stupid thing to do.). Sean Kamath -- UUCP: {decvax allegra ucbcad ucbvax hplabs ihnp4}!tektronix!reed!kamath CSNET: reed!kamath@Tektronix.CSNET || BITNET: reed!kamath@PSUVAX1.BITNET ARPA: reed!kamath@PSUVAX1.CS.PSU.EDU US Snail: 3934 SE Boise, Portland, OR 97202-3126 (I hate 4 line .sigs!)