Path: utzoo!attcan!uunet!husc6!bloom-beacon!tut.cis.ohio-state.edu!mailrus!ames!necntc!necis!smv
From: smv@necis.UUCP (Steve Valentine)
Newsgroups: comp.arch
Subject: 88k register sets?
Message-ID: <631@necis.UUCP>
Date: 31 May 88 15:54:50 GMT
Reply-To: smv@necis.UUCP (Steve Valentine)
Distribution: na
Organization: NEC Information Systems, Acton, MA
Lines: 24

In the 4/28/88 issue of Electronics on pg. 86, 2nd column there is a paragraph
which reads as follows:

"Features of the 88000 that suit it to use as a server include its register-
scoreboarding capability, which makes it possible to for the system to switch
from one task to another (called a context switch) in one clock cycle.  To do
this, the 88100 chip has duplicate sets of CPU registers used by different tasks
running concurrently in the system.  Switching from one task to another requires
only a change in register sets." 

This seems to be a paraphrased statement by Thomas Mace of Convergent Tech.

This is the only mention I have seen of the 88k having multiple register sets.
Is this really true?  If so, which registers are duplicated, and how many sets
are there?  Are CMMU registers duplicated as well?  Do interrupts have to wait
for special funtion units to complete the current instruction, or can they be
taken concurrently?  (Assuming the SFU is working on a many-clock instruction).

It seems odd that this is the only reference to such an important feature.
-- 
Steve Valentine - smv@necis.nec.com
NEC Information Systems 1300 Massachusetts Ave., Boxborough, MA 01719
The whale, in fact, is not a fish.  It is an insect, and it lives on bananas!
					- Peter Cook "Interesting Facts" Sketch