Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!mcnc!ece-csc!ncrcae!ncr-sd!crash!gryphon!pnet02!jdow From: jdow@pnet02.CTS.COM (Joanne Dow) Newsgroups: comp.sys.amiga Subject: Re: Dma Design Advice Wanted Message-ID: <941@gryphon.CTS.COM> Date: Sun, 12-Jul-87 05:10:43 EDT Article-I.D.: gryphon.941 Posted: Sun Jul 12 05:10:43 1987 Date-Received: Mon, 13-Jul-87 01:08:41 EDT Sender: root@gryphon.CTS.COM Organization: People-Net [pnet02], Redondo Beach, CA Lines: 15 Well, here are a couple suggestions based on what I have been reading in the amiga.dev conference on bix... First either have a modest sided FIFO for the disk port to write to and the DMA to read from and write to memory. Otherwise you can get into deep bandini transferring into CHIP ram when running 640x400x4. Another alternative is tell the machine you need a modest sized allocation in the device memory. Then get a decent sized byte wide static ram to place in there. Have the DMA's to CHIP go there instead and then copy to CHIP with the CPU. Then there wil be NO bus contention at all. (I understand that there are no problems particular to the Amiga in DMAing to FAST ram.) <@_@> jdow@bix UUCP: {cbosgd, hplabs!hp-sdd, ihnp4}!crash!gryphon!pnet02!jdow INET: jdow@pnet02.CTS.COM