Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!rutgers!im4u!suhler From: suhler@im4u.UUCP (Paul A. Suhler) Newsgroups: comp.arch Subject: Re: What with these Vector's anyways? Message-ID: <2019@im4u.UUCP> Date: Tue, 21-Jul-87 22:18:43 EDT Article-I.D.: im4u.2019 Posted: Tue Jul 21 22:18:43 1987 Date-Received: Thu, 23-Jul-87 07:04:50 EDT References: <2806@phri.UUCP> Organization: Univ of Texas Elec & Comp Engr Dept Lines: 24 Summary: Conservation of memory bandwidth Here's one more way to explain the purpose of vector instructions. Pardon me if I missed it among the spate of earlier postings. In article <2806@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: >[...] > The problem is that the cpu wastes a lot of time doing the dunky >work of executing the loop, (increment the index and check for upper >limit), computing the addresses for the array references, fectching and >decoding the multiply instruction opcode, etc, and only after all that does >it get to do the "real" work of doing the floating-point multiply. On a >vector processor, you would have a single instruction to do the whole loop. >[...] If you view the limit on performance as being the processor-memory bandwidth, you notice that fetching all of those instructions Roy mentions above consumes a lot of it. Solution: fetch the instruction once (and set up control registers once, etc., etc.) and then just fetch data. The increased data fetch rate also lets you use an arithmetic pipeline efficiently. [I first heard it explained this way by Harvey Cragon a few years ago.] -- Paul Suhler suhler@im4u.UTEXAS.EDU 512-474-9517/471-3903