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From: collinge@uvicctr.UUCP (Doug Collinge)
Newsgroups: sci.electronics
Subject: Re: TTL Questions
Message-ID: <294@uvicctr.UUCP>
Date: Thu, 23-Jul-87 11:48:36 EDT
Article-I.D.: uvicctr.294
Posted: Thu Jul 23 11:48:36 1987
Date-Received: Sat, 25-Jul-87 14:54:48 EDT
References: <1395@crash.CTS.COM> <1008@speech1.cs.cmu.edu>
Reply-To: collinge@uvicctr.UUCP (Doug Collinge)
Distribution: na
Organization: University of Victoria, Victoria B.C. Canada
Lines: 26

In article <1008@speech1.cs.cmu.edu> phd@speech1.cs.cmu.edu (Paul Dietz) writes:
>In article <1395@crash.CTS.COM> rpluth@pnet01.CTS.COM (Ron Pluth) writes:

>>    2.  I've worked with Schottky and Low-power Schottky logic
>>chips in the lab, and have seen that a no connection to inputs,
>>such as a simple AND or OR gate, even sometimes in MUX's and
>>others, drives the input high.  Is this guaranteed true?  
>Never, never, never, never, never assume this! This is the quickest way
>to get into trouble! Yes, standard TTL floats high by nature, but any
>mild strays are enough to glitch it to another state! 

I read a neato book once by a guy who actually went out and tested things
like this, measured the impedance of wirewrap, found out how many bypass
capacitors you actually need, etc.  He said that open TTL inputs WILL NOT
GLITCH even under the most extreme conditions.  Remember, before you flame,
he actually made circuits and tried it out...  He also pointed out that
you can short one output per package indefinitely for testing purposes
with no harm to the chip - actually pretty handy to know.
-- 
		Doug Collinge
		School of Music, University of Victoria,
		PO Box 1700, Victoria, B.C.,
		Canada,  V8W 2Y2  
		collinge@uvunix.BITNET
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