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From: daveh@cbmvax.UUCP (Dave Haynie)
Newsgroups: comp.sys.amiga
Subject: Re: Dma Design Advice Wanted
Message-ID: <2113@cbmvax.UUCP>
Date: Tue, 14-Jul-87 17:07:50 EDT
Article-I.D.: cbmvax.2113
Posted: Tue Jul 14 17:07:50 1987
Date-Received: Fri, 17-Jul-87 02:46:50 EDT
References: <941@gryphon.CTS.COM>
Organization: Commodore Technology, West Chester, PA
Lines: 27

in article <941@gryphon.CTS.COM>, jdow@pnet02.CTS.COM (Joanne Dow) says:
> 
> Have the DMA's to CHIP go there instead and then copy to
> CHIP with the CPU. Then there wil be NO bus contention at all.
> (I understand that there are no problems particular to the Amiga in DMAing to
> FAST ram.)
> <@_@>
>         jdow@bix
> 
You still have a potential problem with DMA latency when talking to FAST
RAM.  If the 68000 is in the process of talking with CHIP RAM when your
DMA controller wants the bus, there can be a wait.  Assume that the DMA
request come in around the first cycle of the horizontal scan of a 640x400x4 
screen, while the 68000 is in the process of reading CHIP RAM.  The 68000
will give your DMA device a bus grant in return for it's request.  But you
can't issue a /BGACK and start the transfer until the end of the cycle.  Since
the custom chips keep the 68000 off the chip bus by wait stating it, that 
cycle won't end until horizontal retrace.  At that point, the DMA device get
the bus, and can DMA to its heart's content.  This is certainly not a bad
a case as trying to DMA to chip memory in the same senario, but it's still
something to consider, and something that doesn't happen at all in video
modes that require less bandwith.

-- 
Dave Haynie     Commodore-Amiga    Usenet: {ihnp4|caip|rutgers}!cbmvax!daveh
"The A2000 Guy"                    PLINK : D-DAVE H             BIX   : hazy
     "Catch a wave and you're sittin' on top of the world" -Beach Boys