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From: corbin@encore.UUCP
Newsgroups: comp.arch
Subject: Re: Phys vs Virtual Addr Caches
Message-ID: <1762@encore.UUCP>
Date: Fri, 17-Jul-87 16:23:22 EDT
Article-I.D.: encore.1762
Posted: Fri Jul 17 16:23:22 1987
Date-Received: Sat, 18-Jul-87 19:48:50 EDT
References: 
Reply-To: corbin@encore.UUCP (Steve Corbin)
Organization: Encore Computer, Marlboro, MA
Lines: 41

In article  bader+@andrew.cmu.edu (Miles Bader) writes:
>> Here's a question.  Why do people build their caches to respond to physical
>> addresses instead of virtual addresses?  Another way to state the question
>> is: why not put the VM -> PM translation logic next to (in parallel with)
>> the data cache, rather than before it?
>
>If different processes have different parts of their virtual address space
>mapped to the same physical memory, a physical cache allows them to share the
>same cache entries.  Also, each cache entry in a virtual cache has to have a
>field describing which address map it's from if you don't want to have to
>flush the cache upon context switch, etc.
>
>				-Miles


The `Segmented Address Space` architecture of Prime systems solves the
problem of multiple cached entries of the same data and doesn't require
the address map identifier in the cache.  It works as follows:

	A specific number of segments in the virtual space are used for
	sharing and are common to the address space of all processes in
	the system.  For example, if segment 1000 is a share segment then
	multiple processes virtual segment 1000 will map to the same
	physical segment in memory.  Thus sharing is achieved, duplicate
	cached entries of the same data is avoided and the mapping for
	the shared data is maintained in one table.

The disadvantage of this approach is that the amount of private memory
each process has available is reduced by the defined amount of shared
space in the system.  For the Prime machines 1/4 of the virtual space
is allocated as shared data.  (actually 1/2 since the operating system
is embedded in 1/4 of the virtual space).


Steve		{ihnp4, allegra, linus} ! encore ! corbin
	
	
-- 

Stephen Corbin
{ihnp4, allegra, linus} ! encore ! corbin