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From: corbin@encore.UUCP
Newsgroups: comp.arch
Subject: Re: Phys vs Virtual Addr Caches
Message-ID: <1761@encore.UUCP>
Date: Fri, 17-Jul-87 16:07:17 EDT
Article-I.D.: encore.1761
Posted: Fri Jul 17 16:07:17 1987
Date-Received: Sat, 18-Jul-87 19:48:17 EDT
References: <3904@spool.WISC.EDU>
Reply-To: corbin@encore.UUCP (Steve Corbin)
Organization: Encore Computer, Marlboro, MA
Lines: 17

In article <3904@spool.WISC.EDU> lm@cottage.WISC.EDU (Larry McVoy) writes:
>Here's a question.  Why do people build their caches to respond to physical
>addresses instead of virtual addresses?  Another way to state the question
>is: why not put the VM -> PM translation logic next to (in parallel with)
>the data cache, rather than before it?
>
>Larry McVoy 	        lm@cottage.wisc.edu  or  uwvax!mcvoy

Take a look at Prime Computer's architecture, they have been doing virtual
caches for over 15 years.  Parallel lookup on cache and TLB is faster than
single threading them but this type of design can pose serious problems
with shared data if the architecture of the machine and the OS is not
done right.
-- 

Stephen Corbin
{ihnp4, allegra, linus} ! encore ! corbin