Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!rochester!kodak!elmgate!jdg From: jdg@elmgate.UUCP (Jeff Gortatowsky) Newsgroups: comp.arch Subject: What with these Vector's anyways? Message-ID: <687@elmgate.UUCP> Date: Mon, 20-Jul-87 12:39:01 EDT Article-I.D.: elmgate.687 Posted: Mon Jul 20 12:39:01 1987 Date-Received: Tue, 21-Jul-87 05:27:49 EDT References: <218@astra.necisa.oz> <142700010@tiger.UUCP> Reply-To: jdg@aurora.UUCP (Jeff Gortatowsky) Followup-To: comp.arch Organization: Eastman Kodak Company, Rochester, NY Lines: 28 Keywords: vector Cray Cyber CDC Cpu Supercomputers Summary: Author wants to understand Super Computer Technology Better In article <2378@ames.arpa> lamaster@ames.UUCP (Hugh LaMaster) writes: [..............] >vectors. If the vectors are not contiguous, then the advantage disappears. > > Hugh LaMaster, m/s 233-9, UUCP {seismo,topaz,lll-crg,ucbvax}! >(Disclaimer: "All opinions solely the author's responsibility") Could someone out there explain to me what the basic idea is behind supercomputer CPU's? I know what a interrupt vector is (ie an address pointing to other address) and so forth. But that obviously (or maybe not?) has nothing to do with the vectors talked of when dealing with supercomputers. Just as Hugh mentions above, I've seen others talking of how a certain function can be 'vectorized(??)' or can't be. And when they can't, supercomputers are dogs (well, slower) etc.... Now I'm no math wiz (that's why I use computers!) but if it could be explained from a hardware standpoint I should be able to grasp the concept. Email if you feel this isn't of interest..... Thank you, Jeff -- Jeff Gortatowsky {seismo,allegra}!rochester!kodak!elmgate!jdg Eastman Kodak Company These comments are mine alone and not Eastman Kodak's. How's that for a simple and complete disclaimer?