Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Path: utzoo!mnetor!uunet!seismo!gatech!bloom-beacon!husc6!mit-eddie!genrad!decvax!decwrl!nsc!nsta!amos
From: amos@nsta.UUCP (Amos Shapir)
Newsgroups: comp.arch
Subject: Re: Phys vs Virtual Addr Caches
Message-ID: <312@nsta.UUCP>
Date: Thu, 16-Jul-87 16:17:46 EDT
Article-I.D.: nsta.312
Posted: Thu Jul 16 16:17:46 1987
Date-Received: Sat, 18-Jul-87 08:52:25 EDT
References: <3904@spool.WISC.EDU>
Reply-To: amos%nsta@nsc.com (Amos Shapir)
Distribution: world
Organization: National Semiconductor (Israel) Ltd. Home of the 32532
Lines: 24
Summary: Some do and some dont
Hdate: 20 Tamuz 5747


In article <3904@spool.WISC.EDU> lm@cottage.WISC.EDU (Larry McVoy) writes:
>Here's a question.  Why do people build their caches to respond to physical
>addresses instead of virtual addresses?

Well, not all do: CCI's 6/32 (also sold by Harris and Sperry) has virtual
caches; the trouble is, in Unix all user processes share the same
virtual space - they all start at their own virtual 0. Having a virtual
cache requires the kernel to either purge all cache at context switch,
or manage a complicated bookkeeping of who has what in which cache (CCI
do the latter).

>If you cache virtual addresses you can present the address to the cache
>as soon as it is generated, no delay do translation.

In machines with physical cache (such as NS32532), this is accomplished
by an auxiliary Translation Look-aside Buffer (TLB); it should be big enough
to be useful, yet small enough to be purged on every context switch
without a significant reduction of performance.

-- 
	Amos Shapir
National Semiconductor (Israel)
6 Maskit st. P.O.B. 3007, Herzlia 46104, Israel  Tel. (972)52-522261
amos%nsta@nsc.com @{hplabs,pyramid,sun,decwrl} 34 48 E / 32 10 N