Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!cbosgd!ihnp4!ptsfa!ames!oliveb!intelca!mipos3!kds From: kds@mipos3.UUCP Newsgroups: comp.unix.xenix,comp.sys.intel,comp.sys.ibm.pc Subject: Re: XENIX 386 benchmark results Message-ID: <826@mipos3.UUCP> Date: Wed, 8-Jul-87 16:34:29 EDT Article-I.D.: mipos3.826 Posted: Wed Jul 8 16:34:29 1987 Date-Received: Sat, 11-Jul-87 16:20:41 EDT References: <127@spdcc.COM> <225@m10ux.UUCP> <139@spdcc.COM> <130@bby-bc.UUCP> Reply-To: kds@mipos3.UUCP (Ken Shoemaker ~) Organization: Intel, Santa Clara, CA Lines: 31 Xref: utgpu comp.unix.xenix:383 comp.sys.intel:272 comp.sys.ibm.pc:4798 In article <130@bby-bc.UUCP> john@bby-bc.UUCP (john) writes: >So if you want to do 16 and 32 bit arithmetic in the same procedure all the >instructions with operands of one of the sizes has to be prefixed? yes... > >Are there instuctions for 16->32 and vice versa conversions along the >lines of CBW? yes, both sign extend and zero extend are provided >Assuming 32 bit wide memory is there any unusual speed penalties for >particular instuctions with 16/32 bit operands, e.g. are shifts faster >with one particualr size? nope, the rate of instruction execution shouldn't change. Of course, it takes a clock to crack a prefix, so if you have lots of them, performance could suffer. My guess as to why 32-bit code seems to run so much faster than 16-bit code on the 386 has to do with the differences in the programming model between 16-bit and 32-bit code: 32-bit code is always "small" mode (i.e., no segment register reloads), can do 32-bit arithmetic operations in a single instruction, and register usage is more general in 32-bit code. -- The above views are personal. ...and they whisper and they chatter, but it really doesn't matter. Ken Shoemaker, Microprocessor Design, Intel Corp., Santa Clara, California uucp: ...{hplabs|decwrl|amdcad|qantel|pur-ee|scgvaxd|oliveb}!intelca!mipos3!kds csnet/arpanet: kds@mipos3.intel.com