Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!uwvax!oddjob!gargoyle!ihnp4!alberta!ubc-vision!fornax!jl From: jl@fornax.uucp (JL) Newsgroups: sci.electronics Subject: Re: TTL Questions Message-ID: <360@fornax.uucp> Date: Fri, 17-Jul-87 11:55:08 EDT Article-I.D.: fornax.360 Posted: Fri Jul 17 11:55:08 1987 Date-Received: Sat, 18-Jul-87 16:51:08 EDT References: <1395@crash.CTS.COM> Organization: School of Computing Science, SFU, Burnaby, B.C. Canada Lines: 49 > > I have a couple questions about TTL logic that I hope can be > answered here... > > 2. I've worked with Schottky and Low-power Schottky logic > chips in the lab, and have seen that a no connection to inputs, > such as a simple AND or OR gate, even sometimes in MUX's and > others, drives the input high. Is this guaranteed true? If so, > does it apply to all families (S, LS, CMOS, etc.)? I'm working > on projects that would be a heck of a lot easier if this were > true. The TTL family logic circuits will float high on an unconnected input. Note, however, that it may not be a wise idea to use this because in a very noisy environment you could find the floating inputs going low on occation. This is very unlikely, but why take the chance? I ALWAYS connect ALL inputs to an output or to the appropiate power rail. ***BUT*** This is NOT true for CMOS !!!!!!!!!!!!!!!!!!!!! ^^^ CMOS inputs may, by chance, float high or low depending on everything from what the rest of the circuit in the IC package is doing to how much noise is in near-by parts of the layout. Not only that, but an unconnected CMOS input can be very easily damaged by static discharge! Never, NEVER, N E V E R leave a CMOS input unconnected! (Unless you want totally unpredictable glitches and burnt out IC's :-> ) By the way, with CMOS circuits, you should really connect up the inputs of the unused gates in a multi-gate IC too because they are just as likely to get zapped by static discharges too. For example, if you are using a 4011 NAND gate and you are using just 1 ( or 2 or 3 ) of the gates, then the other 3 ( or 2 or 1 ) gates should have their inputs connected either to a power rail of the output(s) of some other part of the circuit. Of course the power rail connection is preferable to connecting to other parts of the circuit because then you increase the capacitance of the line and slow the system down. -- Jay-El