Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!ll-xn!cit-vax!peting From: peting@cit-vax.Caltech.Edu (Mark Peting) Newsgroups: sci.electronics Subject: Re: TTL Questions Message-ID: <3326@cit-vax.Caltech.Edu> Date: Fri, 24-Jul-87 15:39:02 EDT Article-I.D.: cit-vax.3326 Posted: Fri Jul 24 15:39:02 1987 Date-Received: Sat, 25-Jul-87 16:00:25 EDT References: <1395@crash.CTS.COM> <1008@speech1.cs.cmu.edu> <294@uvicctr.UUCP> Reply-To: peting@cit-vax.UUCP (Mark Peting) Distribution: na Organization: California Institute of Technology Lines: 30 In article <294@uvicctr.UUCP> collinge@uvicctr.UUCP (Doug Collinge) writes: >I read a neato book once by a guy who actually went out and tested things >like this, measured the impedance of wirewrap, found out how many bypass >capacitors you actually need, etc. He said that open TTL inputs WILL NOT >GLITCH even under the most extreme conditions. Remember, before you flame, >he actually made circuits and tried it out... He also pointed out that >you can short one output per package indefinitely for testing purposes >with no harm to the chip - actually pretty handy to know. >-- As someone who has done many digital projects, I can assure you that unused TTL inputs sometimes WILL glitch. It is true that they won't very often, and sometimes a project will work for days before anything happens, but sooner or later the assumption that they won't will cause you hours of debugging looking for a very intermitant problem. I the author mentioned above may never have tried his test on a large board with large amounts of S parts, since that is the situation in which there is the most potential for problems, since the S type TTL has very fast edge rates that create lots of noise. Also chips can be damaged by shorting only 1 output. I have had boards in which a chip was shorted for some time during debugging, and later failed while the board was in service. In fact almost every failure of my projects that happen months later is in a chip that was abused this way during debugging. I have taken to throwing out chips that I find to have been shorted during debugging to avoid these later failures. Also outputs in chips in the high power families like S TTL will fail very quickly if shorted to VCC. ---------------- Mark Peting peting@cit-vax.caltech.edu