Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!lll-lcc!mordor!styx!ames!ucbcad!ucbvax!MITRE-GATEWAY.ARPA!jgouge From: jgouge@MITRE-GATEWAY.ARPA Newsgroups: comp.lsi Subject: Spice models request Message-ID: <8612301434.AA06749@vlsi-b.mitre.org> Date: Tue, 30-Dec-86 09:34:28 EST Article-I.D.: vlsi-b.8612301434.AA06749 Posted: Tue Dec 30 09:34:28 1986 Date-Received: Wed, 31-Dec-86 00:41:13 EST Sender: daemon@ucbvax.BERKELEY.EDU Organization: The ARPA Internet Lines: 5 Does anyone have level 2 and/or level 3 spice transistor model files representing various process corners appropriate for the MOSIS scmos 3-micron process? Please respond directly to jgouge@mitre-gateway. Thanks, Jim Gouge