Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!seismo!rutgers!mit-eddie!genrad!decvax!tektronix!teklds!midas!neals From: neals@midas.UUCP (Neal Sedell) Newsgroups: comp.sys.m6809 Subject: Re: CoCo3 OS-9 Level I Version 2 problems Message-ID: <982@midas.UUCP> Date: Thu, 8-Jan-87 17:08:50 EST Article-I.D.: midas.982 Posted: Thu Jan 8 17:08:50 1987 Date-Received: Fri, 9-Jan-87 01:40:17 EST References: <1484@lsuc.UUCP> <972@midas.UUCP> <23640@rochester.ARPA> Reply-To: neals@midas.UUCP (Neal Sedell) Distribution: na Organization: Tektronix, Inc., Beaverton, OR. Lines: 41 >What are you masking interrupts for MILLISECONDS for?!?? That's order of >a thousand instructions. In any case masked interrupts aren't a problem >unless you hold the mask for a long time (several milliseconds might >be long enough). The processor will keep one interrupt pending if it >comes in while it's masked. ... > >If you are concerned about missing interrupts you might try flipping >back to the main task and enabling interrupts, then disabling and flipping >back every few hundred instructions. Good to know I'm not just talking to myself, I was beginning to wonder! Actually, I was referring to the fact that to scroll the COCO3 screen you have to move 80*24*2 bytes which takes over 25 mS at 1.8MHz using the LDD 160,X STD ,X++ CMPX #XXXX and BLO loop. The ideas of switching the MMU back and reenabling interrupts every so often (like maybe every line) sounds good. > >The disk driver cripples the CoCo by halting the processor, not by masking >interrupts. Almost every device driver masks interrupts at least briefly. >The 6809 itself turns on the interrupt mask every time it gets an interrupt. Well, it has to do both, since you don't want the CPU going off to service an interrupt when it gets unHALTed. At 1.8MHz the halt becomes unnecessary since there is enough time to poll the floppy controller status register. Now for a new question - what is the Multi-Pak ghost referred to in the GIME posting? As a matter of fact, does anyone have the definitive definition of the M-PAK slot select register? I lost my instructions long ago and just put the disk controller in slot 4 and the RS232 PAK in slot 1. I took it apart one time and verified that along with the CTS and SCS outputs, the interrupt and another input get muxed to/from one and only one slot. I've been working on a dual RS-232, parallel printer port and battery backed up clock card so all my interrupts can fit in one slot. I just wish they had provided an "all slot interrupt enable" bit in the control register. If someone could mail me the above info to me it might be better than posting. Neal Sedell