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From: amos@instable.UUCP (Amos Shapir)
Newsgroups: comp.arch,comp.sys.intel,comp.sys.m68k
Subject: Re: byte order: be reasonable - do it my way...
Message-ID: <669@instable.UUCP>
Date: Sun, 11-Jan-87 02:54:39 EST
Article-I.D.: instable.669
Posted: Sun Jan 11 02:54:39 1987
Date-Received: Mon, 12-Jan-87 23:00:47 EST
References: <760@orcisi.UUCP>
Reply-To: amos%nsta@nsc.com (Amos Shapir)
Organization: National Semiconductor (Israel) Ltd.
Lines: 11
Summary: Hi, uri!
Xref: mnetor comp.arch:183 comp.sys.intel:96 comp.sys.m68k:106

When I was working on CCI's 6/32, which is basically a vax-like architecture
turned MSB-ian, the problem that Uri mentioned (partial read/write to
registers) was hard to resolve. The result: on CCI 6/32, a register is
always long; that requires sign-extension, but that doesn't take more
time than a 'movb'.

-- 
	Amos Shapir
National Semiconductor (Israel)
6 Maskit st. P.O.B. 3007, Herzlia 46104, Israel
(011-972) 52-522261  amos%nsta@nsc 34.48'E 32.10'N