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Posting-Version: version B 2.10.3 alpha 4/3/85; site ukma.UUCP
Path: utzoo!watmath!clyde!cbosgd!ukma!sambo
From: sambo@ukma.UUCP (Father of micro-ln)
Newsgroups: net.arch
Subject: Re: 386 Architectural Description
Message-ID: <2343@ukma.UUCP>
Date: Tue, 29-Oct-85 17:03:32 EST
Article-I.D.: ukma.2343
Posted: Tue Oct 29 17:03:32 1985
Date-Received: Wed, 30-Oct-85 07:24:50 EST
References: <531@petfe.UUCP>
Reply-To: sambo@ukma.UUCP (Father of micro-ln)
Organization: Univ. of KY Mathematical Sciences
Lines: 21

In article <531@petfe.UUCP> bobp@petfe.UUCP (Dan Masi) writes:
>>   32 entry on-chip paging cache (translation lookaside buffer) with 
>>   a 98% hit rate for efficient paging
>>     ^^^^^^^^^^^^
>
>Does this mean that I will see a 98% cache hit rate for *all* programs
>that I can run on this processor???   Hmmm...

I think this flame is unwarranted.  If the author had read the original
posting more closely, he would have noticed that it was a brief des-
cription of the 386, and if he would have bothered to read some more
detailed literature from Intel, he would have found out that this fi-
gure of 98% is for typical systems.
--
Samuel A. Figueroa, Dept. of CS, Univ. of KY, Lexington, KY  40506-0027
ARPA: ukma!sambo<@ANL-MCS>, or sambo%ukma.uucp@anl-mcs.arpa,
      or even anlams!ukma!sambo@ucbvax.arpa
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      or cbosgd!ukma!sambo

	"Micro-ln is great, if only people would start using it."