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Path: utzoo!linus!brando
From: brando@linus.UUCP (T. J. Brando)
Newsgroups: net.micro.68k
Subject: Strange MVME110-1 Bus Errors
Message-ID: <633@linus.UUCP>
Date: Wed, 30-Oct-85 12:20:18 EST
Article-I.D.: linus.633
Posted: Wed Oct 30 12:20:18 1985
Date-Received: Fri, 1-Nov-85 00:22:50 EST
Reply-To: brando@linus.UUCP (T. J. Brando)
Distribution: net
Organization: The MITRE Corporation, Bedford, MA
Lines: 29

I am running four (4) Motorola MVME110-1 singleboards on a VMEbus backplane.
The VME110 in slot 1 is jumpered to serve as VMEbus controller.  If the rate
at which each CPU requests the VMEbus is low enough, everything works fine.
If I increase the request rate sufficiently, eventually the CPU in slot 4
doesn't get the VMEbus within 200 us, its local bus timeout counter hits
bottom, and a bus error exception sequence is initiated.  Fine.  I can handle
that.  That's what you'd expect to happen.  However...

Here's a behavior I don't understand:  All 4 CPUs experience bus errors.
This stops all processing, and gives control to a simple monitor/debugger on
each board (VMEbug 3.0).  What I find is that a memory display command to
display memory available over the VMEbus generates a bus error on the boards
in slots 4, 3, and 2, but when I try the memory display on the board in slot 1
it succeeds, and if I go back to any of the other boards, the memory display
succeeds on them also!

Now if this isn't strange enough... sometimes the memory display on the board
in slot 1 also generates a bus error, in which case I have to reset the
backplane controller (and, therefore, the other 3 boards) before anyone can
execute the memory display successfully!

Does this make sense to anyone out there?  I don't see how this could possibly
be caused by my program.  It seems to me to indicate some problem with the
VMEbus arbiter on the controller board.  Has anyone else had any experiences
similar to these?  HELP!!!

Thom Brando                     linus!brando@MITRE-BEDFORD.{ARPA,BITNET,CSNET}
617-271-3156.NET          {allegra,decvax,ihnp4,philabs,...}!linus!brando.UUCP