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From: dave@enmasse.UUCP (Dave Brownell)
Newsgroups: net.micro,net.arch
Subject: 386 Press release
Message-ID: <488@enmasse.UUCP>
Date: Thu, 31-Oct-85 13:17:59 EST
Article-I.D.: enmasse.488
Posted: Thu Oct 31 13:17:59 1985
Date-Received: Sun, 3-Nov-85 14:21:53 EST
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Reply-To: dave@enmasse.UUCP (Dave Brownell)
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Organization: Enmasse Computer Corp., Acton, Mass.
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I'd be interested in some REAL TECHNICAL SPECS on the '386 ... I
was glad to see that press release the first time (in the trade press),
but tend to agree that there are enough sources for marketing hype
without putting it on the net.

So what about it, Cliff?  How many registers, how orthogonal the
instruction set, how did the 32 bit segments get in without performance
penalties?  Any nifty instructions?  What's this "OS support"?
How often can I expect to get 4 MIPS?

THAT is the kind of advance info I'd like to see here ...
-- 
David Brownell
EnMasse Computer Corp
...!{harvard,talcott,genrad}!enmasse!dave