Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site wdl1.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!think!harvard!seismo!hao!hplabs!hpda!fortune!wdl1!jbn From: jbn@wdl1.UUCP Newsgroups: net.micro.68k Subject: Re: Multiple 68020's on VME ? Message-ID: <729@wdl1.UUCP> Date: Mon, 30-Sep-85 20:59:49 EDT Article-I.D.: wdl1.729 Posted: Mon Sep 30 20:59:49 1985 Date-Received: Thu, 3-Oct-85 06:36:02 EDT Sender: notes@wdl1.UUCP Organization: Ford Aerospace, Western Development Laboratories Lines: 22 Nf-ID: #R:rna:-44200:wdl1:22700016:000:898 Nf-From: wdl1!jbn Sep 30 17:57:00 1985 We have a system with several bus masters on one VMEbus, and ran into the following problems: 1) The Omnibyte CPU card incorrectly performed its slot 1 bus arbitration function, due to a problem with the Motorola bus arbiter chip. Omnibyte replaced the chip with a small daughter board with two chips, which fixed the problem. 2) The Ironics RAM card was discovered to raise DTACK before it was done with the data; as long as the cycle came from a M68000 this was OK, because the M68000 kept the lines up just long enough for it to work, but our own DMA peripheral didn't and the RAM board would write bad parity into memory. No fix; we've switched to DY-4 RAM cards. Moral: ask your board vendor ``Have you run this thing with multiple bus masters?'' Both these cards work beautifully until you put on the second bus master. John Nagle