Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 11/03/84 (WLS Mods); site escher.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!princeton!astrovax!escher!doug From: doug@escher.UUCP (Douglas J Freyburger) Newsgroups: net.lang.c Subject: Re: Can C default to float? Are there float regs? Message-ID: <56@escher.UUCP> Date: Sat, 21-Sep-85 19:23:59 EDT Article-I.D.: escher.56 Posted: Sat Sep 21 19:23:59 1985 Date-Received: Sun, 22-Sep-85 06:54:39 EDT References: <418@phri.UUCP> <700002@fthood> <187@graffiti.UUCP> <175@mit-bug.UUCP> <897@turtlevax.UUCP> <698@sfmag.UUCP> Organization: NASA/JPL, Pasadena, CA Lines: 49 The discussion has been about single vs double precision floating point as well as keeping them in registers. It was mentioned that there w{{uld be a big speed difference on the VAX. At site "cithep", the Caltech High Enerrgy Physics Department, they made a C compiler that used single precision for "float". At first, they got ALMOST NO SPEED IMPROVEMENT. After adding floating point immediate values to the assembler produced (instead of storing constants like strings and then referring to them by name), they got a pretty good improvement. 10-20%. I don't know if they were running a 750 or 780. Still, for calculations that only involve variables and no constants, the difference is much smaller than you'd think. The difference is smaller than you would think, but then, has anyone ever seen an instruction timing diagram for any VAX model published by DEC? No. The large number of models is one reason. The complexity of cache-hit vs cache-miss vs page-fault out of the physical memory pool vs page-fault out of disk is another reason. Still, I think they should be able to publish the timings for cache-hits and cache-misses on a per-model basis. They DO have the microcode sources available to count from. I am guessing that they put a lot more effort into optimizing the double precision floating point, and they are hesitant to show that in public. Ever look at the assembler produced by BLISS-32 on a VMS machine? That BLISS compiler obviously knows some stuff that the rest of us don't. It uses indexed address modes instead of ADDs, in-line multiplies instead of POLYs, and other tricks that I don't even recognize that LOOK like they should be slower than the obvious way. It looks like instructions that people think are faster are even sometimes slower. -- Doug Freyburger DOUG@JPL-VLSI, DOUG@JPL-ROBOTICS, JPL 171-235 ...escher!doug, doug@aerospace, Pasadena, CA 91109 etc. Disclaimer: The opinions expressed above are far too ridiculous to be associated with my employer. Unix is a trademark of Bell Labs, VMS is a trade mark of DEC, and there are others that I'm probably forgeting to mention.