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From: somanathan@elmer.DEC (Chandrasekhara)
Newsgroups: net.nlang.india
Subject: india/VLSI
Message-ID: <582@decwrl.UUCP>
Date: Wed, 25-Sep-85 21:45:31 EDT
Article-I.D.: decwrl.582
Posted: Wed Sep 25 21:45:31 1985
Date-Received: Sat, 28-Sep-85 04:46:45 EDT
Sender: daemon@decwrl.UUCP
Organization: Digital Equipment Corporation
Lines: 24


india/vlsi !!

International Workshop on VLSI Design being held at IITM 
December 26 thru 28, 1985.
Sponsored by Computer Society of India.

emphasis:
design rules, layout/routing, logic/circuit simulation, timing analysis,
testing, VLSI design workstations, silicon compilation, semi-custom design,
design data_base, expert systems, algorithms for VLSI implementation.

This workshop seems to be in the light of an upcoming 3 and 5 micron nmos/cmos
silicon foundry being set_up in India.

program coordinators:
Vishwani Agrawal @ Bell Labs, NJ.
H. N. Mahabala CS&E Dept, IITM.


somanathan
digital/hudson,mass

ps: my apologies should this info be dated on nlang.india