Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site brl-tgr.ARPA Path: utzoo!linus!philabs!cmcl2!seismo!brl-tgr!tgr!GUBBINS@RADC-TOPS20.ARPA From: GUBBINS@RADC-TOPS20.ARPA (Gern) Newsgroups: net.micro.cpm Subject: Re: S-100 bus board problems Message-ID: <727@brl-tgr.ARPA> Date: Thu, 15-Aug-85 15:02:26 EDT Article-I.D.: brl-tgr.727 Posted: Thu Aug 15 15:02:26 1985 Date-Received: Mon, 19-Aug-85 07:59:52 EDT Sender: news@brl-tgr.ARPA Lines: 45 For anyone doing ANY work with an S-100 system, especially if it is an older, possibly not IEEE-696 or even a new Z-100 which is IEEE-696, you MUST get a copy of the book by Sol Libes and Mark Garetz. I think the correct title is Interfacing to the IEEE-696/S-100 Bus. It is very well written and will describe everything you need to know. It helps if you have a copy of the standard: IEEE Standard 696 Interface Devices ANSI/IEEE Std 696-1983 It is Heathkit part number 500-69 A rough draft of the standard was published July 1979 in Computer (IEEE) magazine. The standard says the +8 lines (pins 1 & 51) must have an instantaneous minium greater than +7V, instant max less than 25V and an average max less than +11V. The pin 2 is 14.5<16<35V with average <21.5 Pin 52 is the same, but negative. As far as signals go, high state is +2V or greater on the reciever end. If you have an old S-100 system, therer are about 4 lines that have have been changed, but they were never used much anyhow (Memory write lock, etc.). Major concern is the bus termination circuits to prevent ringing and such. I am doing a lot of work at home, on the side on a 6 channel stereo sound/speech Synthesizer/joysticks (both analog and digital types)/ clock-calendar with battery backup and on-chip-leap-year. The design is finalized and I am workin on the PC Board layout. It is completely IEEE-696/S-100. So if you have any S-100 questions, I'll take a stab at them. Cheers, Gern -------