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From: RCONN@SIMTEL20.ARPA (Rick Conn)
Newsgroups: net.micro.cpm
Subject: Re: HD64180 boards
Message-ID: <679@brl-tgr.ARPA>
Date: Tue, 13-Aug-85 14:51:03 EDT
Article-I.D.: brl-tgr.679
Posted: Tue Aug 13 14:51:03 1985
Date-Received: Mon, 19-Aug-85 05:49:40 EDT
Sender: news@brl-tgr.ARPA
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I'm working on an SB180 board (Steve Ciarcia's design) now.  SUPER board.
This 7 1/2" by 4" SBC has an HD64180, 256K bytes RAM, 2 RS-232C drivers,
1 parallel port, and a floppy disk controller for 3 1/2", 5 1/4", and 8"
floppies.  All running the Z System with a RAM disk.  Clock speed is 6+ MHz.

Note that by using the HD64180, the HD64180 ALONE has 64 I/O ports internally,
providing 2 UARTs (RS-232C line drivers are off-chip), one clocked
serial port, 2 timers/counters, 2 DMA controllers (mem-to-mem,
mem-to-io, and mem-to-mem-mapped-io transfers), and a 12-level
priority interrupt controller.  Most impressive.

Finally, the new Echelon ZAS assembler (a Z System tool) assembles the
extended instructions for the 64180, and the ZDMH debugger helps
debug, recognizing 64180 instructions.  So there is a toolset to
support 64180 development available now as well.

	Rick
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