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From: steveg@hammer.UUCP (Steve Glaser)
Newsgroups: net.micro.68k,net.micro.16k
Subject: Re: PDP11s vs the micros
Message-ID: <1425@hammer.UUCP>
Date: Mon, 5-Aug-85 21:58:33 EDT
Article-I.D.: hammer.1425
Posted: Mon Aug  5 21:58:33 1985
Date-Received: Sat, 10-Aug-85 04:43:39 EDT
References: <1617@hao.UUCP> <847@mako.UUCP> <2422@sun.uucp> <2994@nsc.UUCP> <2506@sun.uucp> <877@mako.UUCP> <2547@sun.uucp>
Reply-To: steveg@hammer.UUCP (Steve Glaser)
Organization: Tektronix, Wilsonville OR
Lines: 23
Xref: linus net.micro.68k:981 net.micro.16k:329

The "p-machine" garbage for the 32xxx was probably just early marketing
hype.  It's real difficult to sell anything in a big company unless you
hang it on something familiar.  The "p-machine" is an old system that
was probably familiar to somebody in charge at the time.

Remember that there was a chip known as the 16016 in the family.  That
was a 16032 (aka 32016 nowdays) with Intel 8080 emulation mode added
(not Z-80, just 8080).  (Gee you could write a CP/M emulator.)  This
should give you some insight into their thinking at the time.  (No I
wasn't there, but I was an early user of the chipset).

As for eliminating auto +/- addressing mode, I support that decision.
Given their decision to "back out" instructions that get page faults
rather than dump out the internal microstate like the 68010, National
would have to keep shadow copies of too much internal stuff around in
case a page fault came through.  That's a big hassle and takes chip
real estate.  I think having full memory to memory addressing is more
useful that auto +/-, especially for compiler generated code.  (well
maybe not for pcc -- it's model seems to be put something in a
register, munch on it, put it back in memory).

	Steve Glaser
	steveg.tektronix@csnet-relay.arpa       or tektronix!steveg