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From: gnu@sun.uucp (John Gilmore)
Newsgroups: net.arch
Subject: Re: 68020 instruction cache size
Message-ID: <2582@sun.uucp>
Date: Thu, 8-Aug-85 20:33:38 EDT
Article-I.D.: sun.2582
Posted: Thu Aug  8 20:33:38 1985
Date-Received: Mon, 12-Aug-85 02:34:35 EDT
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Organization: Sun Microsystems, Inc.
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> Is there any architectural reason why Motorola at some future date
> could not issue a 6802x with a larger instruction cache?

It's well enough designed that they could change it between this month's
rev of the chip and next month's, if they wanted to.  Software would
have to do some abnormal things to DETERMINE the cache size.  (Of course
you could tell to some degree by performance.)