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Path: utzoo!linus!philabs!cmcl2!seismo!lll-crg!dual!qantel!hplabs!sdcrdcf!markb
From: markb@sdcrdcf.UUCP (Mark Biggar)
Newsgroups: net.arch,net.lang,net.micro,net.micro.pc
Subject: Re: Integer division on the Intel iAPX8[6,8]
Message-ID: <2233@sdcrdcf.UUCP>
Date: Wed, 7-Aug-85 12:10:08 EDT
Article-I.D.: sdcrdcf.2233
Posted: Wed Aug  7 12:10:08 1985
Date-Received: Mon, 12-Aug-85 22:18:22 EDT
References: <2018@ukma.UUCP>
Reply-To: markb@sdcrdcf.UUCP (Mark Biggar)
Organization: System Development Corp. R+D, Santa Monica
Lines: 17
Xref: linus net.arch:1476 net.lang:1469 net.micro:10190 net.micro.pc:4641

In article <2018@ukma.UUCP> sambo@ukma.UUCP (Inventor of micro-S) writes:
>the IDIV instruction for the Intel 8086 and 8088.  It says that the minimum
>negative quotient for a byte division is -127, and the minimum negative quo-
>tient for a word division is -32767.  I tested this, and lo and behold, both
>-128 / 1 and -32768 / 1 do indeed generate a division-by-zero interrupt.  I
>am wondering three things:
>     1) Why does this happen - i.e. what hardware algorithm does this proces-
>sor use?

The actual divide algorithm only works on positive numbers, so the input
values have their signs remembered and the twos-complement is taken for
negatives.  But, the twos-complement of 0x8000 or 0x80 (done by complementing
and adding 1) is still 0x8000 or 0x80; so the algorithm now ignores the sign
bits (thinking the numbers are now positive) and divides by zero.

Mark Biggar
{allegra,burdvax,cbosgd,hplabs,ihnp4,akgua,sdcsvax}!sdcrdcf!markb