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From: kds@intelca.UUCP (Ken Shoemaker)
Newsgroups: net.micro.68k,net.micro.16k
Subject: Re: Re: PDP11s vs the micros
Message-ID: <34@intelca.UUCP>
Date: Thu, 8-Aug-85 13:58:22 EDT
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Posted: Thu Aug  8 13:58:22 1985
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> It may also be easier to do pipelining if fewer of the addressing modes have
> side-effects - you don't have to worry about the (r4)+ two pipeline stages
> behind screwing up your movl r4, (or, if you have multiple copies
> of the general register set, having to worry about propagating the change
> from the auto-increment to the instruction-unit copy of r4 forward to the
> execution-unit copy at the right time).

On the subject of side effects and pipelining, has anyone thought of
the problems of treating the pc as a general register (with autoincrement,
etc.) at the same time as you added some level of prefetch?  This would
seem to me to get very ugly, having to keep track of things in the
prefetch buffer whenever you address/adjust off the pc.  Indeed, this
could limit the amount of instruction pre-processing/cracking you could
do (or increase dramatically increase the amount of logic that is required).
Any solutions besides punting?
-- 
...and I'm sure it wouldn't interest anybody outside of a small circle
of friends...

Ken Shoemaker, Microprocessor Design for a large, Silicon Valley firm

{pur-ee,hplabs,amd,scgvaxd,dual,qantel}!intelca!kds
	
---the above views are personal.  They may not represent those of the
	employer of its submitter.