Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.1 6/24/83; site oakhill.UUCP Path: utzoo!watmath!clyde!bonnie!akgua!whuxlm!harpo!decvax!genrad!panda!talcott!harvard!seismo!ut-sally!oakhill!davet From: davet@oakhill.UUCP (Dave Trissel) Newsgroups: net.micro.68k Subject: Re: Latest MC68020 bug list by request Message-ID: <497@oakhill.UUCP> Date: Thu, 22-Aug-85 19:49:59 EDT Article-I.D.: oakhill.497 Posted: Thu Aug 22 19:49:59 1985 Date-Received: Sun, 25-Aug-85 02:33:36 EDT References: <483@oakhill.UUCP> <5883@utzoo.UUCP> Reply-To: davet@oakhill.UUCP (Dave Trissel) Organization: Motorola Inc. Austin, Tx Lines: 39 In article <5883@utzoo.UUCP> henry@utzoo.UUCP (Henry Spencer) writes: [speaking about 881 bugs...] >There is another that friends of mine are quite disgruntled about: the >chip has a vast amount of internal state, hundreds of bytes, and might >perhaps do context-switching acceptably fast if it had DMA (!), which it >naturally doesn't. Yes, ideally onboard DMA could double the speed of the context save and restore operations. Early on we had to make an estimate of the many tradeoffs involved in having a '881 with DMA. It was then determined that for the basic instruction set (everything but FMOVEM and FSAVE/RESTORE) the DMA would not have improved execution time. One reason being that to verify memory protection would require talking between the '881 and '020 which would have nullified most DMA gains. There were other more subtle issues as well, but the most important was the added complexity it would have added to the '881. Picture the people involved with the project - their task was to design a floating-point chip far more comprehensive than any other and be the first to utilize the new co-processor interface definitions on the MC68020 project which was "growing up" and evolving on its own at the same time. The extra burden of bus master would only have been considered if there was a noticible gain in overall performance. We also considered the down-the-road aspect of merging the '881 in a future chip with the '020 chassis in which case the DMA would have to be re-designed back out of the machine. Once we did decide against the bus master scenario we did include some minor architectural items to try to lessen the pain of context save/restore. First the '881 indicates whether it has been used so that the OS dispatcher can skip the saving of control and FP registers at times. Second, we put a lot of work into the '020 coprocessor interface such that external interrupts could be taken even mid-instruction at certain points of '881 execution. -- Dave Trissel {ihnp4,seismo}!ut-sally!oakhill!davet Motorola Semiconductor Inc. Austin, Texas