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Path: utzoo!watmath!clyde!burl!ulysses!ucbvax!decvax!decwrl!greipa!paul
From: paul@greipa.UUCP (Paul A. Vixie)
Newsgroups: net.arch
Subject: Re: Sparse addressing info wanted
Message-ID: <271@greipa.UUCP>
Date: Mon, 8-Jul-85 20:27:54 EDT
Article-I.D.: greipa.271
Posted: Mon Jul  8 20:27:54 1985
Date-Received: Thu, 11-Jul-85 07:45:55 EDT
References: <306@cstvax.UUCP> <353@scgvaxd.UUCP>
Reply-To: paul@greipa.UUCP (Paul A. Vixie)
Organization: Genstar Rental Electronics, Palo Alto, Ca.
Lines: 13


I think when he said "vaxes don't have sparse addressing" he was alluding to
the 30-bit addresses.  The top 2 bits of VAX/VMS memory addresses denote "P0"
or "P1" space; addresses above 0x80000000 cannot be mapped into without some
special priviledge and then *very carefully* lest you map out your SYS$------
vectors.

Just thought I'd clear that up.  Except for this error, the VAX would be as
nice to write code for as a NS32000.
-- 

	Paul Vixie
	{decwrl dual pyramid}!greipa!paul