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From: dollas@uiucdcsb.Uiuc.ARPA
Newsgroups: net.arch
Subject: Re: Floating pt. A/D converter
Message-ID: <5600033@uiucdcsb>
Date: Thu, 11-Jul-85 22:30:00 EDT
Article-I.D.: uiucdcsb.5600033
Posted: Thu Jul 11 22:30:00 1985
Date-Received: Sat, 13-Jul-85 08:39:32 EDT
References: <293@eneevax.UUCP>
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Nf-From: uiucdcsb.Uiuc.ARPA!dollas    Jul 11 21:30:00 1985


To the best of my knowledge there is no such thing as a floating point
A/D converter. The job of an A/D converter is to resolve an
analog signal within a range to a binary number. Usually
16 or 18 bits are about as good as you can get (and on top of that I 
claim that even if you had more bits of accuracy there would be little
use for them since the signals you are most likely to digitize are not
that accurate, there is noise, etc). With these 16 or 18 bits you can
convince yourself that the IEEE floating point format is an overkill,
even if you decide to only use the mantissa part of it. 

Since for the computational part (or for any other reason) you want to
use the IEEE format, if all the chips you use are of the same family (ie
compatible) you can set all the bits of the exponent to the value that 
is effectively zero (that would be 127 due to the exponent bias I think)
and use the bits of your A/D  as the most significant digits of the 
mantissa (and hardwire the rest to logical 'zero').  Here you see that
if you want to change the offset of the range you can do it hardware-wise,
or in the software. 

As a last remark, there may be out there a format converter chip that 
translates a weighted binary number to IEEE standard format; I do not
know of the existence of such a chip, maybe other netters do however.

Good Luck!

Apostolos Dollas
U of Illinois 
Dept. of Computer Science
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