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From: gnu@sun.uucp (John Gilmore)
Newsgroups: net.arch
Subject: Re: A feature, not a bug?
Message-ID: <2362@sun.uucp>
Date: Fri, 28-Jun-85 05:41:27 EDT
Article-I.D.: sun.2362
Posted: Fri Jun 28 05:41:27 1985
Date-Received: Mon, 1-Jul-85 06:34:25 EDT
References: <1680@amdcad.UUCP> <36900007@ima.UUCP>
Organization: Sun Microsystems, Inc.
Lines: 16

John Levine, ima!johnl, said:
> Sounds pretty smart to me.  Why waste chip real estate with locking circuits 
> that'll be used .0001% of the time?  I expect that the WE 32100 chip 
> special-cases the interlocking between branches and the tests they depend 
> on.  For that matter, the 360/91 did that 15 years ago.

Of course, the /91 had to do it while running object code
that ran on all the other models.  It therefore needed the
wasteful locking circuits.

I agree that on a new machine, the frequency of "read condition codes"
is so small that effectively making it a double-size opcode
(NOP,READCONDITIONCODES) is a win.  Of course, when they build a
chip that runs two instructions simultaneously, they'll need
those ubiquitous locking circuits again for object code compatability
with today's chips.