Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/17/84 chuqui version 1.7 9/23/84; site daisy.UUCP Path: utzoo!watmath!clyde!bonnie!akgua!sdcsvax!sdcrdcf!hplabs!nsc!daisy!david From: david@daisy.UUCP (David Schachter) Newsgroups: net.arch Subject: Re: multi-state logic Message-ID: <72@daisy.UUCP> Date: Wed, 27-Feb-85 03:51:21 EST Article-I.D.: daisy.72 Posted: Wed Feb 27 03:51:21 1985 Date-Received: Sun, 3-Mar-85 05:27:12 EST References: <685@whuxlm.UUCP> Reply-To: david@daisy.UUCP (David Schachter) Distribution: net Organization: Daisy Systems Corp., Mountain View, Ca Lines: 6 Summary: Some of the megabit dynamic RAMs being presented at the ISSCC (The IEEE Solid State Circuits Conference) use multi-level logic to reduce the number of cells. (This is according to the ISSCC preview in a recent Electronics Week magazine. The magazine is published by McGraw Hill and is available in many libraries.)