Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site wateng.UUCP Path: utzoo!watmath!wateng!ksbszabo From: ksbszabo@wateng.UUCP (Kevin Szabo) Newsgroups: net.micro.68k Subject: Re: 32 vs. 24 Bit Addresses Message-ID: <2089@wateng.UUCP> Date: Sun, 3-Mar-85 14:44:19 EST Article-I.D.: wateng.2089 Posted: Sun Mar 3 14:44:19 1985 Date-Received: Mon, 4-Mar-85 06:34:30 EST References: <342@oakhill.UUCP> <608@mako.UUCP> Reply-To: ksbszabo@wateng.UUCP (Kevin Szabo) Organization: VLSI Group, U of Waterloo Lines: 17 Summary: In article <608@mako.UUCP> jans@mako.UUCP (Jan Steinman) writes: >I know of a 68010 software project that DEPENDS on those bits being >masked off chip. It uses the eight most significant bits of pointers to >objects as flags that contain information obout those objects. Of course, >if a usable Motorola MMU is available when they port to the 68020, they can >simply fold that huge address space over... Wow! Another IBM-like blunder in the making. It's been a while, but wasn't this the problem that haunted IBM when they tried to use the top eight bits of their 32 bit address register? Every tom dick & harry had used them to hold a few flags `cause no one will ever have a 32 bit address space'. History repeats itself, even before it's history! Kevin -- Kevin Szabo watmath!wateng!ksbszabo (U of Waterloo VLSI Group, Waterloo Ont.)