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From: brooks@lll-crg.ARPA (Eugene D. Brooks III)
Newsgroups: net.micro.16k
Subject: Re: Re: Corrigenda (24-bit addresses)
Message-ID: <435@lll-crg.ARPA>
Date: Wed, 31-Dec-69 18:59:59 EST
Article-I.D.: lll-crg.435
Posted: Wed Dec 31 18:59:59 1969
Date-Received: Sat, 9-Mar-85 19:15:05 EST
References: <794@sjuvax.UUCP> <5025@utzoo.UUCP> <2342@nsc.UUCP> <952@watdcsu.UUCP> <2373@nsc.UUCP> <983@watdcsu.UUCP> <2385@nsc.UUCP> <344@ <400@terak.UUCP>
Organization: Lawrence Livermore Labs, CRG group
Lines: 16

> So you're gonna spend maybe 20 G's or more on a memory system, and
> to "cut costs" you're gonna use an off-the-shelf microprocessor like
> a 68020 or 32032?  Gimme a break!

I currently do memory intensive simulation work where it would be desireable
to have more than 16mb of physical data memory.  We now use a VAX 11/780 for
this simulation work.  We are purchasing of a multiprocessor to use in this
simulation work (yes, using all of the cpus on the same problem) where the
basic cpu node is of all things that meager little 32032.  It seems that
a dozen or so of them can do a good job of keeping more than 16mb busy.
We sure would like to have more than 16mb of real memory available for our
work and you can sure bet that National will widen the virtual address bus
as soon as they get the bugs out of the current chip set.  As far as using
a custom processor is concerned there currently isn't a more cost effective
source of cycles than that $500(wishful thinking) 32032 chip set.  You just
have to use more than one chip set at a time on your problem.