Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.2 9/18/84; site amdcad.UUCP
Path: utzoo!watmath!clyde!cbosgd!ihnp4!amdcad!phil
From: phil@amdcad.UUCP (Phil Ngai)
Newsgroups: net.micro
Subject: Re: Zilog 8530 information wanted
Message-ID: <435@amdcad.UUCP>
Date: Sun, 23-Dec-84 17:05:37 EST
Article-I.D.: amdcad.435
Posted: Sun Dec 23 17:05:37 1984
Date-Received: Mon, 24-Dec-84 03:20:57 EST
References: <786@enea.UUCP>
Distribution: net
Organization: AMDCAD, Sunnyvale, CA
Lines: 33

I have a few hints for you.

1) Read the technical manual. Then read it again. It took me about five
readings to become proficient. The latest Zilog one is the best version.

2) Zilog has an app note on initializing the 8530 and I recommend it.

3) Beware the cycle recovery time when doing DMA, you must provide
it somehow. You can withhold either RD/WR or CE, either one qualifies
although this is not clear in the documentation but was derived from
looking at the schematics of the 8530.

4) It is possible to do vectored interrupts but you will have to provide
wait states in some cases, depending on the speed of your 80186 and 8530.

5) You will almost certainly have to provide wait states in the read
and write cycles but the 80186 can do this. Applying the 80186
read and write lines will violate the 8530 address set up times,
you must delay them.

6) (a simple point but some people get burned) Remember to use
a clock 16 times your actual data rate in async mode.

7) you can actually use a time constant of 0 in the baud rate
generator.

Naturally, I think you should use AMD AmZ8530s.
-- 
 AMD assumes no responsibility for anything I may say here.

 Phil Ngai (408) 749-5790
 UUCP: {ucbvax,decwrl,ihnp4,allegra}!amdcad!phil
 ARPA: amdcad!phil@decwrl.ARPA