Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84 Brag 10-8-84; site bragvax.UUCP Path: utzoo!linus!decvax!ittvax!dcdwest!sdcsvax!sdcrdcf!hplabs!bragvax!david From: david@bragvax.UUCP (David DiGiacomo) Newsgroups: net.micro Subject: Re: 4->8->16->32->64? bit micros Message-ID: <282@bragvax.UUCP> Date: Fri, 21-Dec-84 15:33:17 EST Article-I.D.: bragvax.282 Posted: Fri Dec 21 15:33:17 1984 Date-Received: Sun, 23-Dec-84 07:56:51 EST References:<280@oakhill.UUCP> <466@intelca.UUCP> <18341@lanl.ARPA> Organization: Brag Systems Inc., San Mateo, CA Lines: 22 In article <18341@lanl.ARPA> James Giles writes: >The main problem with 64 bit micros is the pin count on the chip >32 address lines and 64 data lines already make >96 pins on the chip! This is not too bad-- 144 and even 216 lead packages are defined and will be fairly common by the time 64 bit micros are practical. Peripheral chips tend to require many more leads than processors. >Multiplexing these lines only defeats the purpose >behind going to 64 bits to begin with. Not necessarily true-- most current (and future) 32 bit microprocessors and system buses use multiplexed addresses and data. There is very little performance penalty; addresses and data are naturally separated in time so they can share a bus effectively. -- -- One moment of pleasure, a lifetime of regret: Usenet Madness David DiGiacomo, BRAG Systems Inc., San Mateo CA (415) 342-3963 {cbosgd hplabs intelca rhino}!bragvax!david