Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site fortune.UUCP Path: utzoo!watmath!clyde!cbosgd!ihnp4!fortune!wall From: wall@fortune.UUCP (Jim Wall) Newsgroups: net.arch Subject: Re: new Hitachi 32bit microprocessor chip Message-ID: <4711@fortune.UUCP> Date: Fri, 30-Nov-84 17:14:26 EST Article-I.D.: fortune.4711 Posted: Fri Nov 30 17:14:26 1984 Date-Received: Sat, 1-Dec-84 20:45:34 EST References: <4696@fortune.UUCP> Reply-To: wall@fortune.UUCP (Jim wall) Distribution: fs,net Organization: Fortune Systems, Redwood City, CA Lines: 12 The info on the new Hitachi chip is somewhat contradictory at this time. It is both a RISC chip and yet also is code compatible with the 68000!!! Two opposite ends of the spectrum. It is supposed on have an onboard MMU and cache controller, as well as an instruction cache. It is also supposed to come out at 20 MHz and go up to 40 MHz with future silicon. In other words, it is all on the drawing boards and is a long way off. -Jim