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From: gnu@sun.uucp (John Gilmore)
Newsgroups: net.micro.68k
Subject: 68020 Performance, 68881 info from Dtack Grounded
Message-ID: <1843@sun.uucp>
Date: Tue, 4-Dec-84 04:11:33 EST
Article-I.D.: sun.1843
Posted: Tue Dec  4 04:11:33 1984
Date-Received: Thu, 6-Dec-84 05:17:04 EST
Organization: Sun Microsystems, Inc.
Lines: 41

Quote without comment from Dtack Grounded, issue #37, Nov/Dec 84, pg 23:

68020 WATCH

We have been guilty of overthusiasm in estimating the performance of the
68020.  Motorola has now published a fairly detailed performance
analysis.  When they speak of a 4-1 speed improvement, they are talking
about a 16.67MHz 68020 vs an 8MHz 68000, each with no wait state, and
code optimized for the 68020.  A no-wait-state 16.67MHz 68020 needs,
according to Motorola's literature, 90 nsec SYSTEM access time on the
RAMs - and that includes the delays of address multiplexers, decoders,
buffers, and data buffers.  Translation: 68020 systems will have wait
states unless you have unlimited DOD-type dollars.  What you and we are
presumably interested in is the speed improvement using 150nsec DRAM and
comparing the 16.67MHz 68020 with the 12.5MHz 68000 - and that looks to
be about 2-1 even.  The initial sample 68020s run at 12.5MHz so we are
looking at less than 2-1.  (These figures assume the use of a 32-bit
data bus for the 68020.)

MATH CHIP STUFF

The 68881 has finally seen first silicon; now we will see if Motorola
can break the existing record time of 2.5 years between first silicon
and a working (production) complex F.P. math chip.  We would like to be
optimistic, but anybody who 'bets the company' on early arrival of
production 68881s would be a fool, considering the historical record.
(We DO think Motorola can beat that 2.5 years, but by how much?)

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