Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.1 6/24/83; site oakhill.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxj!mhuxn!houxm!ihnp4!zehntel!hplabs!hao!seismo!ut-sally!oakhill!davet From: davet@oakhill.UUCP (Dave Trissel) Newsgroups: net.arch Subject: Re: new Hitachi 32bit microprocessor chip Message-ID: <254@oakhill.UUCP> Date: Tue, 4-Dec-84 06:52:25 EST Article-I.D.: oakhill.254 Posted: Tue Dec 4 06:52:25 1984 Date-Received: Thu, 6-Dec-84 05:48:28 EST References: <4696@fortune.UUCP>Reply-To: davet@oakhill.UUCP (Dave Trissel) Distribution: fs,net Organization: Motorola Inc. Austin, Tx Lines: 24 Summary: In article <4711@fortune.UUCP> wall@fortune.UUCP (Jim wall) writes: > > The info on the new Hitachi chip is somewhat contradictory at >this time. It is both a RISC chip and yet also is code compatible >with the 68000!!! Two opposite ends of the spectrum. > > It is supposed on have an onboard MMU and cache controller, as >well as an instruction cache. It is also supposed to come >out at 20 MHz and go up to 40 MHz with future silicon. In other >words, it is all on the drawing boards and is a long way off. > > -Jim *THIS ISNOT OFFICIAL MOTOROLA POLICY BUT MY OWN OPINION* In my opinion Hitachi is trying to *scare* Motorola into letting them second source the MC68020. They very well may have the plans they talk about on the drawing board, but don't hold your breath waiting for first silicon. I think the idea is *give us the 20 or we will just do something better.* I am not worried. Motorola Semiconductor Dave Trissel Austin, Texas 32-bit Applications Engineer