Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/3/84; site talcott.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!genrad!wjh12!talcott!gjk From: gjk@talcott.UUCP (Greg J Kuperberg) Newsgroups: net.arch Subject: Re: Re: new Hitachi 32bit microprocessor chip Message-ID: <154@talcott.UUCP> Date: Sun, 2-Dec-84 10:51:18 EST Article-I.D.: talcott.154 Posted: Sun Dec 2 10:51:18 1984 Date-Received: Wed, 5-Dec-84 01:29:52 EST References: <4696@fortune.UUCP> <4711@fortune.UUCP> Distribution: fs,net Organization: Harvard Lines: 15 > > The info on the new Hitachi chip is somewhat contradictory at > this time. It is both a RISC chip and yet also is code compatible > with the 68000!!! Two opposite ends of the spectrum. > The 68000 is not very CISC or RISC. It is roughly in the middle between the two. To those of us that have been using Intel stuff for a few years, it looks RISC'y, but then again, Intel could be called FCISC (fucking complicated instruction set). --- Greg Kuperberg harvard!talcott!gjk "Eureka!" -Archimedes