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From: doug@oakhill.UUCP (Doug MacGregor)
Newsgroups: net.micro.68k
Subject: 68020 performance
Message-ID: <230@oakhill.UUCP>
Date: Wed, 31-Oct-84 16:54:28 EST
Article-I.D.: oakhill.230
Posted: Wed Oct 31 16:54:28 1984
Date-Received: Fri, 2-Nov-84 05:01:33 EST
Organization: Motorola Inc. Austin, Tx
Lines: 104



I understand the motivation behind the note authored by Joe Falcone concerning
the comparison of the 68020 and a VAX. In principle I agree with his comments.
I understand that my figures representing the performance of the 68020 can be
taken out of context by those with a marketing or sales bent to unfairly
compare a processor with a system. In all of the work that I have done, I have 
been very deliberate in avoiding comparisons with any system. Because 
comparisons of this sort are so simplistic and erroneous, I never felt that 
they were an issue to anyone who knew how computers worked.

However, I strongly disagree with some of the interpretations that Mr. Falcone
has drawn as well as some of the conclusions made. 

First, the interpretations of the 68020 performance are a bit narrow.
The note implies that there are no applications except systems equivalent
to a VAX. These non-system applications which include real-time robotics,
graphics, and communication applications are a substantial portion of the 
68020 market. These applications are concerned with the performance of
the processor alone, not a system.

Second, it is implied that general purpose computer systems are not capable
of running without wait states. This is a dangerous underestimation of the
capability of the various system implementors using the 68020. The notion
of an off-chip cache is mentioned but then discarded. I do not believe
that it is possible to dispose of the various system solutions available
to the system designers, many of which are already being used on 68000 systems.

Third, reviewing the performance figures cited in the note there are several
very significant discrepancies. Assuming that we use the figure of 3-5x
performance of a VAX-11/780 to an 8MHz 68000 then I don't understand
how the table below was generated.
                    
>                "VAX MIPS"
>   
>   CPU                100ns          200ns           300ns
>   ----------------------------------------------------------
>   8MHz    68000    0.14-0.23      0.14-0.23       0.14-0.23
>   16MHz   68020*   0.42-0.70      0.30-0.50       0.24-0.40
>   16MHz   68020**  0.56-0.90      0.46-0.76       0.40-0.66
>   ----------------------------------------------------------
>   VAX-11/780                      0.7-1.0       
>   VAX-11/785                      1.0-1.5       
>   ----------------------------------------------------------
>   * I-cache disabled
>   ** 100% I-cache hit ratio

If we start with the presumption that 3-5x is valid then I assume
we use 4x for the 11/780 to 68000 comparison. This would give us
the following performance figures:

CPU                100ns          200ns           300ns
----------------------------------------------------------
8MHz    68000    0.18-0.25      0.18-0.25       0.18-0.25
----------------------------------------------------------
VAX-11/780                      0.7-1.0       
VAX-11/785                      1.0-1.5       
----------------------------------------------------------
                                                         
Using the 68000-68020 relationship shown in the performance tables 
in IEEE MICRO in terms of 68000 performance. 

CPU                100ns          200ns           300ns
----------------------------------------------------------
8MHz  68000        0.6 (1x)       0.6 (1x)        0.6 (1x)  
16MHz 68020*       2.1 (3.5x)     1.5 (2.5x)      1.3 (2.2x)
16MHz 68020**      2.7 (4.5x)     2.3 (3.7x)      2.0 (3.3x)
----------------------------------------------------------

When the two tables are combined, it shows a respectable cost/performance
ratio. If a microprocessor based product performs at or above the
level of a VAX, that seems significant.
                                                       
CPU                100ns          200ns           300ns
----------------------------------------------------------
8MHz  68000      0.18-0.25      0.18-0.25       0.18-0.25
16MHz 68020*     0.61-0.88      0.44-0.63       0.39-0.55    
16MHz 68020**    0.79-1.13      0.65-0.93       0.58-0.83
----------------------------------------------------------
-------------------------
VAX-11/780       0.7-1.0       
VAX-11/785       1.0-1.5       
-------------------------
                                                         
Fourth, the 68020 was designed to operate at 16MHz worst case, just as there
are currently 10 and 12.5MHz 68000 and 68010's available now, it is not
unrealistic to anticipate higher frequency 68020's in the years to come.

In conclusion, we designed a chip which is a processor. We did not design
a system. When we describe the performance of our chip it is only appropriate
to describe it in terms of a processor. There are too many variables that
can make a comprehensible evaluation impossible (i.e. compiler technology,
system configuration, system access times, etc.) that don't have anything
to do directly with the performance "capability" of the 68020. For this
reason, I feel that this method of performance evaluation is not only
appropriate, but essential.

P.S.  I would be interested in seeing a performance evaluation of the 
VLSI-based VAX and microVAX processors as well as the systems,  are there 
any public descriptions of these?


Doug MacGregor