Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.1 6/24/83; site ut-sally.UUCP Path: utzoo!linus!philabs!cmcl2!seismo!ut-sally!crandell From: crandell@ut-sally.UUCP (Jim Crandell) Newsgroups: net.arch Subject: Re: Arbitrary byte alignment Message-ID: <3637@ut-sally.UUCP> Date: Tue, 9-Oct-84 10:43:45 EDT Article-I.D.: ut-sally.3637 Posted: Tue Oct 9 10:43:45 1984 Date-Received: Fri, 12-Oct-84 05:14:11 EDT References: <426@ima.UUCP> Organization: U. Texas CS Dept., Austin, Texas Lines: 15 There is in fact a rather obvious solution to the alignment/performance issue (I cannot bring myself to call it a problem) which satisfies everyone except the members of a group I shall refer to as X. Assuming eight-bit bytes and 32-bit words, the method involves four independent byte-wide* memories (two LSBs for bank select), a +0:+1:+2:+3 circuit, and eight 4-by-4 crossbar switches. The exact details of implementation, the reasons for its unpopularity, and the identity of X are left as rather trivial exercises for the reader. * Mostek legal department please note hyphen and lack of capitals. -- Jim Crandell, C. S. Dept., The University of Texas at Austin {ihnp4,seismo,ctvax}!ut-sally!crandell