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From: gnu@sun.uucp (John Gilmore)
Newsgroups: net.arch
Subject: Re: Arbitrary byte alignment
Message-ID: <1745@sun.uucp>
Date: Mon, 15-Oct-84 22:55:34 EDT
Article-I.D.: sun.1745
Posted: Mon Oct 15 22:55:34 1984
Date-Received: Wed, 17-Oct-84 09:01:05 EDT
References: <470@houxl.UUCP> <420@intelca.UUCP>
Organization: Sun Microsystems, Inc.
Lines: 22

>                                                            I sure 
> wish some of todays processors were so talented and didn't need
> such archaic things such as byte, and word alignment with bytes
> fixed at 8 bits.
> --Chuck

I thought people (even at Intel :-) ) would know by now that the 68020
has even better bit-string-manipulation facilities than the DEC 10/20.
The 10's required the bit string to fit in a single memory word; the
68020 allows totally arbitrary alignment.  The 68020 also takes a byte
address as the base, and adds a 32-bit signed bit number; if you don't
need the byte addressas e.g. an array base, you can still address up to
2Gbits or 256Mbytes with simple sequential bit numbers (easy for
hardware since the word size is a power of 2).  There are 8
instructions that work with such bitfields: load (signed & unsigned),
store, set (to ones), clear, invert, test, and find-first-one-bit.

Note that such instructions have more overhead (both on the 10 and the
68020) than their simpler relations (eg load a whole aligned word).
There's still room for fixed-size bytes in an architecture -- the 432
proved that.