Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site turtlevax.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxj!ihnp4!zehntel!dual!amd!turtlevax!ken From: ken@turtlevax.UUCP (Ken Turkowski) Newsgroups: net.arch Subject: Re: Arbitrary byte alignment Message-ID: <558@turtlevax.UUCP> Date: Sun, 14-Oct-84 21:00:42 EDT Article-I.D.: turtleva.558 Posted: Sun Oct 14 21:00:42 1984 Date-Received: Tue, 16-Oct-84 05:29:24 EDT References: <426@ima.UUCP> <3637@ut-sally.UUCP> Organization: CADLINC, Inc. @ Palo Alto, CA Lines: 21 > There is in fact a rather obvious solution to the alignment/performance > issue (I cannot bring myself to call it a problem) which satisfies > everyone except the members of a group I shall refer to as X. > Assuming eight-bit bytes and 32-bit words, the method involves four > independent byte-wide* memories (two LSBs for bank select), a > +0:+1:+2:+3 circuit, and eight 4-by-4 crossbar switches. The exact > details of implementation, the reasons for its unpopularity, and the > identity of X are left as rather trivial exercises for the reader. An extension of this technique is used in high-performance raster graphics systems, which allows access to several horizontally-, vertically-, or block-contiguous pixels. It is called a tesselated frame buffer, and is described in two recent papers, one about a year ago in IEEE Computer Graphics and Applications, the other in this years' SIGGRAPH tutorial on State-of-the-Art in Image Synthesis. If there is any interest, I can dig up the exact references and post them to the net. -- Ken Turkowski @ CADLINC, Palo Alto, CA UUCP: {amd,decwrl,flairvax,nsc}!turtlevax!ken ARPA: turtlevax!ken@DECWRL.ARPA