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From: chris@proper.UUCP (Chris Hayes )
Newsgroups: net.micro.trs-80
Subject: Trs-80/Z80 hardware, help wanted.
Message-ID: <1301@proper.UUCP>
Date: Mon, 4-Jun-84 10:13:46 EDT
Article-I.D.: proper.1301
Posted: Mon Jun  4 10:13:46 1984
Date-Received: Thu, 7-Jun-84 19:33:09 EDT
Organization: Proper UNIX, San Leandro, CA
Lines: 14


 
I have a problem regarding my model III. I am
building hardware for it that requires a time-out
period of 500ns with a 50% duty cycle. (I know BLETCH!)
Anyway, I need to use WAIT states to synchnonize
my Z80A CPU to this. The trouble is that nowhere
can I find adequate info on what happens during
WAIT states. Any help will be appreciated.
(I dont have any Zilog data sheets, maybe one of those will tell?)
 
				Tnx in advance...
				Chris Hayes
				ucbvax!dual!proper!chris