Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.1 6/24/83; site kobold.UUCP
Path: utzoo!watmath!clyde!burl!ulysses!harpo!decvax!genrad!grkermit!masscomp!kobold!tjt
From: tjt@kobold.UUCP
Newsgroups: net.arch
Subject: Re: Hybrid stack/register machines
Message-ID: <285@kobold.UUCP>
Date: Fri, 16-Mar-84 06:45:37 EST
Article-I.D.: kobold.285
Posted: Fri Mar 16 06:45:37 1984
Date-Received: Sun, 18-Mar-84 07:14:30 EST
References: <177@harvard.UUCP> <5935@umcp-cs.UUCP>
Organization: Masscomp, Westford, MA
Lines: 14

While we're at it, I thought there were some real machines out there
where cached memory addresses are effectively faster than registers.
The hardware/microcode partially decodes the instructions and starts
fetching the memory reference well in advance of when it's needed, but
doesn't perform any prefetch for registers.

I also thought that the explanation for why PUSH instructions on the
VAX-11/780 are slower than the corresponding MOV instructions was
similar: there is lots of special microcode for MOV's that starts
decoding the operand addresses as early as possible, but PUSH
instructions are not processed early.
-- 
	Tom Teixeira,  Massachusetts Computer Corporation.  Westford MA
	...!{ihnp4,harpo,decvax}!masscomp!tjt   (617) 692-6200 x275