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Path: utzoo!utcsrgv!mason
From: mason@utcsrgv.UUCP (Dave Mason)
Newsgroups: net.arch
Subject: Re: uP architecture - (nf)
Message-ID: <1660@utcsrgv.UUCP>
Date: Sat, 2-Jul-83 16:45:13 EDT
Article-I.D.: utcsrgv.1660
Posted: Sat Jul  2 16:45:13 1983
Date-Received: Sat, 2-Jul-83 17:29:21 EDT
References: <1659@utcsrgv.UUCP>
Organization: CSRG, University of Toronto
Lines: 24

The 1802 does have a couple other interesting features (tho Newman is right
about difficult to code for) the address bus is 8 bits multiplexed, so
extra chips are needed to interface anything resembling standard memory.
On the other hand, it has a built in DMA, and for the right application
can be quite good.  Its real problem is that subroutine calls are a crock!
If you need more than 2-3 modules, forget it.  Its not really that slow..
unless you try to use more subroutines!
    I think the reasons the 8080 was/is so awful are historical... the 4004
4-bit controller chip was produced I BELIEVE on contract, someone at Intel
thought they might sell a few if they made it a shade more general..so they
made the 8008...a few more changes made the 8080...and it was cast in stone!
    The Z-80 was designed by some ex-Intel people to be upward compatible,
so that's their excuse, but I really don't understand why the 6800 & 6500
people didn't do a better job.  Probably related to the silicon real-estate
shortage and more probably to the abysmal state (i.e. non-existence) of
decent chip circuit design software.  When you're doing it by hand, trying
to catch up, for a presumed simple market, you make the hardware as simple
as you can.
    Sorry for the long history lesson, but from the question about the
8080 it seems some people must be new to the micro area..hope its helped.
-- Gandalf's flunky Hobbit -- Dave Mason, U. Toronto, CSRG
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