Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10 7/1/83; site rlgvax.UUCP Path: utzoo!linus!philabs!seismo!rlgvax!guy From: guy@rlgvax.UUCP Newsgroups: net.arch Subject: Re: uP architecture - (nf) Message-ID: <741@rlgvax.UUCP> Date: Fri, 1-Jul-83 22:43:58 EDT Article-I.D.: rlgvax.741 Posted: Fri Jul 1 22:43:58 1983 Date-Received: Sat, 2-Jul-83 22:39:34 EDT References: <189@ucbcad.UUCP> Organization: CCI Office Systems Group, Reston, VA Lines: 47 The version of the origin of the 8008 I saw, in (if I remember correctly) an article in an old issue of IEEE Computer magazine written by somebody at Intel, said that the original impetus for the 8008 was as a replacement for a TTL machine built by Datapoint as the brain of one of their terminals. The original intent was just to make a MOS 1-chip version of that processor, but the guy who did this said, "Hey, this could be a useful CPU! What a neat idea - a CPU on one chip!" and tweaked it a little to make it more general. The rest, of course, is history... I've also heard that some of the limitations of the 8008 were due to limited chip real estate. It's interesting to note that the most popular "member" of the 8-bit side of that family (from all the machine descriptions I've heard) is 1) not made by Intel and 2) has added a *lot* of stuff to the architecture. I refer, of course, to the Z80. Unfortunately, Zilog seems to have had trouble following up that success - a pity, because the Z8000 seems to be a fairly clean and regular architecture. It has a read, if somewhat odd, large address space capability (it's called "segmented mode" but pointers are really 24 bits long; there are no "segment registers" which have to be managed independently of the general registers), a good orthogonal instruction set with the usual PDP-11ish addressing modes, "enough" general registers, and a decent set of 32-bit arithmetic instructions (unlike a certain otherwise excellent 16-bit micro with 32-bit capabilities but no 32-bit multiply or divide). Of the four major 16-bit micros (I include Zilog here, even though the Z8000 is running quite a bit behind the 80.*[68] and 680.. families), all but the 8086 and cousins are quite PDP-11 influenced. In fact, most of the highly-praised "mainstream" mini/micro architectures are - the PDP-11 (by definition), the VAX-11, the MC68000, the Z8000, and the NS16032 (any I've forgotten?). The people who did the PDP-11 have a lot to be proud of. In a computer architecture "January term" seminar in college, somebody discussed the three design teams that worked on PDP-11 designs. One was DeCastro's group, which essentially did the Nova; one was the group that did the PDP-11; and one was the group that did the GRI-99, which was a machine that dropped off the edge of the earth, as far as I can tell. Interesting to note that the PDP-11 was one of the first popular minis to be a Complex Instruction Set Computer, while the Nova was definitely a Restricted Instruction Set Computer (of course, it didn't have thousands of general registers, but hardware was expensive then) - in fact, it was a fairly clean and regular RISC, as opposed to some of the machines of the time. The PDP-11 type architectures won out eventually, but the idea of a machine with a simple instruction set is making a comeback. Of course, the emphasis is not now on cost (minimal machine means fewer chips means fewer boards) but on things like using the low-cost VLSI hardware for tons of registers instead of for control logic and microcode store. Guy Harris {seismo,mcnc,we13,brl-bmd,allegra}!rlgvax!guy