Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!linus!decvax!harpo!seismo!hao!hplabs!sri-unix!MADLER@mit-ml From: MADLER@mit-ml@sri-unix.UUCP Newsgroups: net.micro Subject: Intel MPSC Message-ID: <3535@sri-arpa.UUCP> Date: Wed, 27-Jul-83 21:24:00 EDT Article-I.D.: sri-arpa.3535 Posted: Wed Jul 27 21:24:00 1983 Date-Received: Sun, 31-Jul-83 20:36:12 EDT Lines: 10 From: Michael C. AdlerDoes anybody have any idea whether a character sequence can cause the intel MPSC line controller to lose sync in monosynch mode? We have a chip that seems to lose sync when the frequency of marks on the line increases. As far as we know, NOTHING should cause it to lose sync unless explicity commanded by the CPU (auto enables is off). Thanks, -Michael