From: utzoo!decvax!ucbvax!info-vax Newsgroups: fa.info-vax Title: Article-I.D.: ucbvax.7956 Posted: Thu Jul 8 12:59:28 1982 Received: Fri Jul 9 03:42:01 1982 >From decvax!microsof!fluke!vax1.witters@Berkeley Thu Jul 8 12:59:33 1982 Sorry about replying this way, but I don't know how to insert minus signs into a path name. The local version of inews barfs on minus signs. Please put me on your mailing list for VLSI design. The following is a request I sent out earlier for a design program. Perhaps you know of one that already exists. I am looking for a program to help do logic design. The program should run under UNIX or VMS on a VAX, or under RSTS on an 11/70. I am willing to pay for it if the price is reasonable. The specific problem I'm trying to solve is a state machine with eight inputs, three state variables, and four outputs. I would rather use a computer to solve this problem than try and solve it using seven Karnaugh maps of eleven variables each. Because of speed and space requirements I can't use a ROM based state machine so I have to use AND-OR-INVERT logic. The ideal program would take as its input a state transition table, then automatically reduce the number of states if possible, assign state variables to the states, perform logic minimization, and produce a set of Boolean logic equations for the state machine. I would be delighted if such a program exists, but would settle for less. A logic minimization program using the Quine-McCluskey algorithm or something similar would be useful since I can always assign the states myself. A program which generates Karnaugh maps given a state transition table and the state assignments would also be useful. Below is part of a state transition table similar to the one I'm trying to solve. Inputs Outputs I1 I2 I3 I4 I5 I6 I7 I8 PRESENT NEXT O1 O2 O3 O4 STATE STATE X X X X X X 0 X A A 0 0 0 0 X X X X X 0 1 X A B 0 0 0 0 X X X X X 1 1 X A C 0 0 0 0 X X X X X 0 X X B B 0 0 0 0 X 1 1 1 X 1 X X B A 0 0 0 0 X 1 1 0 X 1 X X B C 0 0 0 0 X 1 0 1 X 1 X X B C 0 0 0 0 X 0 1 1 X 1 X X B C 0 0 0 0 X 1 1 0 X X X X C D 0 0 0 0 X 1 0 1 X X X 0 C G 1 0 0 0 1 1 0 1 X X X 1 C C 1 0 0 0 0 1 0 1 X X X X C G 1 0 0 0 X 0 1 1 X X X 0 C E 1 0 0 0 0 0 1 1 X X X X C E 1 0 0 0 1 0 1 1 X X X 1 C D 1 0 0 0 0 = logic low 1 = logic high X = don't care (high or low) A,B,C,D,E,F,G = states Please note that this is a logic design problem, not a logic simulation problem. All of the time sharing services I've tried either provide nothing or a simulation program. The few design programs I've found won't allow 'don't care' terms in the input variables. John Witters John Fluke Mfg. Co. Inc. P.O.B. C9090, M/S 243F Everett, Washington 98206 (206) 356-5274 P.S. For those of you who may have seen this message before, I apologize. We have been having trouble with the local implementation of netnews. I tried sending this out several times. -JDW