| Emulator Test Suite question [message #144438] |
Mon, 30 April 2007 22:28  |
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Originally posted by: JT Cook
I am programming a C64 emulator and am using the Emulator Test Suite
to track down bugs. My emulator has passed all the Trap test except
Trap 12. Does anyone know exactly the what Trap 12 test does? Thank
you.
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| Re: Emulator Test Suite question [message #144441 is a reply to message #144440] |
Wed, 02 May 2007 11:05  |
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Originally posted by: JT Cook
As far as the other tests, all the opcode tests have been passed, some
of the timing tests have failed. Thanks for the info, that should help
sort out the problem. I also found that doc and it looks like it is
packed with some execellent info. Thanks.
On May 1, 3:00 pm, "David Horrocks" <davidhorro...@btinternet.com>
wrote:
> Hi,
> I assume that you mean that all tests prior to Trap12 have passed and not
> just the previous traps. The documentation says that Trap12 tests for "wrap
> around and IO trap for pointer accesses". I had a very quick look at some of
> the code for Trap12.
>
> Trap12 sets the IRQ vector at RAM $FFFE, then banks switches the RAM in and
> Kernal out and then calls a BRK instruction. It then starts testing
> interactions that use the various "indirect indexed", "indexed indirect",
> absolute indexed addressing modes for where the value in the X or Y
> registers can wrap around a 256 byte boundary. e.g. ORA ($4E, X) where X +
> $4E > $FF. Many "unofficial" opcodes are tested such as opcode $03 (SLO($4E,
> X)). My guess is that some of the these wrap around functions will access
> I/O ($D000-$DFFF) and cause precise side affects which are then tested for.
>
> You should check that have implemented the wrap around memory access
> bug/features of the NMOS 6510 CPU. See "Documentation for the NMOS
> 65xx/85xx Instruction Set" by Marko Mäkelä. I seem to remember that the 6510
> makes some peculiar memory accesses when executing an instruction that
> involves a 256 byte wrap-a-round. Keep in mind that the 6510 make a read or
> write access for every clock cycle of every instruction whilst the cpu is
> not in "halt mode". So if an instruction is 8 clocks long then you should
> have 8 memory or I/O accesses to account for. These affects would not be
> noticed while accessing RAM or ROM but would be most apparent while running
> in I/O space or referencing I/O space.
>
> Regards
> David
>
> "JT Cook" <jtc...@avalondreams.com> wrote in message
>
> news:1177986505.411978.283610@u30g2000hsc.googlegroups.com...
>
>
>
>> I am programming a C64 emulator and am using the Emulator Test Suite
>> to track down bugs. My emulator has passed all the Trap test except
>> Trap 12. Does anyone know exactly the what Trap 12 test does? Thank
>> you.- Hide quoted text -
>
> - Show quoted text -
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