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Transwarp GS questions [message #357499] Tue, 28 November 2017 08:22 Go to next message
anthonypaulo is currently offline  anthonypaulo
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Anyone have a link to some docs that explains how the Transwarp GS does it's thing? I'm particularly interested in knowing a) why they needed to use a CPU cable attachment that wasn't necessary in the original Transwarp and b) how they handled DMA since the hardware reference states that access to certain areas won't work in High Speed mode; perhaps they stay in 1mhz mode the whole time or switch between speeds depending on what they want to access?
Re: Transwarp GS questions [message #357500 is a reply to message #357499] Tue, 28 November 2017 12:59 Go to previous messageGo to next message
Anonymous
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Originally posted by: James Davis

On Tuesday, November 28, 2017 at 5:22:25 AM UTC-8, Anthony Ortiz wrote:
> Anyone have a link to some docs that explains how the Transwarp GS does it's thing? I'm particularly interested in knowing a) why they needed to use a CPU cable attachment that wasn't necessary in the original Transwarp and b) how they handled DMA since the hardware reference states that access to certain areas won't work in High Speed mode; perhaps they stay in 1mhz mode the whole time or switch between speeds depending on what they want to access?

Anthony,

You might find some clues in the ReactiveMicro Microdrive/Turbo Users Manual PDF about DMA on the IIGS, but it is not all inclusive.

http://www.reactivemicro.com/?*/MicroDriveTurbo.pdf

I just read it last night.

You might find some clues in other such manuals, e.g., for the ZipChip, etc..

James Davis
Re: Transwarp GS questions [message #357501 is a reply to message #357499] Tue, 28 November 2017 13:11 Go to previous messageGo to next message
Anonymous
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Originally posted by: James Davis

On Tuesday, November 28, 2017 at 5:22:25 AM UTC-8, Anthony Ortiz wrote:
> Anyone have a link to some docs that explains how the Transwarp GS does it's thing? I'm particularly interested in knowing a) why they needed to use a CPU cable attachment that wasn't necessary in the original Transwarp and b) how they handled DMA since the hardware reference states that access to certain areas won't work in High Speed mode; perhaps they stay in 1mhz mode the whole time or switch between speeds depending on what they want to access?

http://ae.applearchives.com/apple_iigs/transwarp_gs/
Re: Transwarp GS questions [message #357504 is a reply to message #357499] Tue, 28 November 2017 17:20 Go to previous messageGo to next message
Anonymous
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Originally posted by: Matthew Power

On Tuesday, November 28, 2017 at 8:22:25 AM UTC-5, Anthony Ortiz wrote:
> Anyone have a link to some docs that explains how the Transwarp GS does it's thing?

I've been (very) slowly working on upgrading my Transwarp GS and the reactivemicro documentation is very informative on many aspects of the card.
Re: Transwarp GS questions [message #357509 is a reply to message #357499] Wed, 29 November 2017 11:50 Go to previous messageGo to next message
Anonymous
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Originally posted by: MG

On Tuesday, November 28, 2017 at 5:22:25 AM UTC-8, Anthony Ortiz wrote:
> Anyone have a link to some docs that explains how the Transwarp GS does it's thing?

I don't have a lot of docs that others haven't already suggested but I have some knowledge...

> I'm particularly interested in knowing a) why they needed to use a CPU cable attachment that wasn't necessary in the original Transwarp

They need to use the CPU cable because the slots always run at 1 MHz, whereas the majority of the RAM in a typical Apple IIgs is on the fast side of the bus, which is only accessible in full from the CPU socket. While it may be possible to design a IIgs accelerator that works entirely off of the slot bus, it would never be able to access the fast RAM at full speed.

> and b) how they handled DMA since the hardware reference states that access to certain areas won't work in High Speed mode; perhaps they stay in 1mhz mode the whole time or switch between speeds depending on what they want to access?

According to https://wiki.reactivemicro.com/TransWarp_GS, GAL 8 controls slowing of the Transwarp GS when DMA is asserted.

MG
Re: Transwarp GS questions [message #357510 is a reply to message #357499] Wed, 29 November 2017 11:51 Go to previous messageGo to next message
Anonymous
Karma:
Originally posted by: MG

On Tuesday, November 28, 2017 at 5:22:25 AM UTC-8, Anthony Ortiz wrote:
> Anyone have a link to some docs that explains how the Transwarp GS does it's thing?

I don't have a lot of docs that others haven't already suggested but I have some knowledge...

> I'm particularly interested in knowing a) why they needed to use a CPU cable attachment that wasn't necessary in the original Transwarp

They need to use the CPU cable because the slots always run at 1 MHz, whereas the majority of the RAM in a typical Apple IIgs is on the fast side of the bus, which is only accessible in full from the CPU socket. While it may be possible to design a IIgs accelerator that works entirely off of the slot bus, it would never be able to access the fast RAM at full speed.

> and b) how they handled DMA since the hardware reference states that access to certain areas won't work in High Speed mode; perhaps they stay in 1mhz mode the whole time or switch between speeds depending on what they want to access?

According to https://wiki.reactivemicro.com/TransWarp_GS, GAL 8 controls slowing of the Transwarp GS when DMA is asserted.


MG
Re: Transwarp GS questions [message #357617 is a reply to message #357499] Wed, 29 November 2017 14:16 Go to previous messageGo to next message
Anonymous
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Originally posted by: James Davis

Didn't someone (maybe MJM) say (in an older post here) that the Transwarp GS worked like the ZipChip does?
Re: Transwarp GS questions [message #357622 is a reply to message #357617] Wed, 29 November 2017 15:20 Go to previous messageGo to next message
Michael J. Mahon is currently offline  Michael J. Mahon
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James Davis <JPD.Enterprises@outlook.com> wrote:
> Didn't someone (maybe MJM) say (in an older post here) that the Transwarp
> GS worked like the ZipChip does?
>

The ZipGS (card) is similar to the Transwarp GS, but different from the
8-bit Zip Chip.

In particular, the Zip Chip has no access to the peripheral bus, so it
doesn't see DMA, and is therefore incompatible with it.

It also does not implement the RDY line, which makes it incompatible with
most floating-point accelerator cards (and a few others), but it
accelerates Applesoft BASIC without any modifications, so that's largely
moot.

--
-michael - NadaNet 3.1 and AppleCrate II: http://michaeljmahon.com
Re: Transwarp GS questions [message #357632 is a reply to message #357622] Wed, 29 November 2017 21:23 Go to previous messageGo to next message
anthonypaulo is currently offline  anthonypaulo
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On Wednesday, November 29, 2017 at 3:20:28 PM UTC-5, Michael J. Mahon wrote:
> James Davis <wrote:
>> Didn't someone (maybe MJM) say (in an older post here) that the Transwarp
>> GS worked like the ZipChip does?
>>
>
> The ZipGS (card) is similar to the Transwarp GS, but different from the
> 8-bit Zip Chip.
>
> In particular, the Zip Chip has no access to the peripheral bus, so it
> doesn't see DMA, and is therefore incompatible with it.
>
> It also does not implement the RDY line, which makes it incompatible with
> most floating-point accelerator cards (and a few others), but it
> accelerates Applesoft BASIC without any modifications, so that's largely
> moot.
>
> --
> -michael - NadaNet 3.1 and AppleCrate II: http://michaeljmahon.com

I read about the Transwarp GS being compatible with DMA cards, unlike the original Transwarp. I'm guessing this is because, unlike the original Transwarp that needed to keep DMA pulled all the time since it needed to act as a CPU, the Transwarp GS is connected directly to the CPU and therefore *IS* the CPU so no DMA is needed? If so, does it use INHIBIT line to intercept all non-IO calls?
Re: Transwarp GS questions [message #357633 is a reply to message #357617] Wed, 29 November 2017 21:29 Go to previous messageGo to next message
Anonymous
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Originally posted by: James Davis

On Wednesday, November 29, 2017 at 11:16:18 AM UTC-8, James Davis wrote:
> Didn't someone (maybe MJM) say (in an older post here) that the Transwarp GS worked like the ZipChip does?

Maybe it was just Transwarp, without the GS, that someone said worked like the ZipChip does.
Re: Transwarp GS questions [message #357635 is a reply to message #357633] Wed, 29 November 2017 22:23 Go to previous messageGo to next message
Michael J. Mahon is currently offline  Michael J. Mahon
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James Davis <JPD.Enterprises@outlook.com> wrote:
> On Wednesday, November 29, 2017 at 11:16:18 AM UTC-8, James Davis wrote:
>> Didn't someone (maybe MJM) say (in an older post here) that the
>> Transwarp GS worked like the ZipChip does?
>
> Maybe it was just Transwarp, without the GS, that someone said worked
> like the ZipChip does.
>

Bingo.

--
-michael - NadaNet 3.1 and AppleCrate II: http://michaeljmahon.com
Re: Transwarp GS questions [message #357637 is a reply to message #357632] Wed, 29 November 2017 23:55 Go to previous messageGo to next message
gbody4 is currently offline  gbody4
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The TWGS monitors DMA and will update the cache and it might read from the cache during DMA transfers if the current address being accessed is cached
Re: Transwarp GS questions [message #357640 is a reply to message #357633] Thu, 30 November 2017 08:21 Go to previous messageGo to next message
Steven Hirsch is currently offline  Steven Hirsch
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On 11/29/2017 09:29 PM, James Davis wrote:
> On Wednesday, November 29, 2017 at 11:16:18 AM UTC-8, James Davis wrote:
>> Didn't someone (maybe MJM) say (in an older post here) that the Transwarp
>> GS worked like the ZipChip does?
>
> Maybe it was just Transwarp, without the GS, that someone said worked like
> the ZipChip does.

In the sense that it doesn't cooperate with DMA, that's true. Otherwise, they
are different in their operation. The ZipChip caches a working set of memory
blocks internally to support high-speed operation. The original Transwarp
completely replaces 128k of system memory with its own on-board RAM.
Re: Transwarp GS questions [message #357647 is a reply to message #357640] Thu, 30 November 2017 11:49 Go to previous messageGo to next message
Michael J. Mahon is currently offline  Michael J. Mahon
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Steven Hirsch <snhirsch@gmail.com> wrote:
> On 11/29/2017 09:29 PM, James Davis wrote:
>> On Wednesday, November 29, 2017 at 11:16:18 AM UTC-8, James Davis wrote:
>>> Didn't someone (maybe MJM) say (in an older post here) that the Transwarp
>>> GS worked like the ZipChip does?
>>
>> Maybe it was just Transwarp, without the GS, that someone said worked like
>> the ZipChip does.
>
> In the sense that it doesn't cooperate with DMA, that's true. Otherwise, they
> are different in their operation. The ZipChip caches a working set of memory
> blocks internally to support high-speed operation. The original Transwarp
> completely replaces 128k of system memory with its own on-board RAM.

I was referring to the late model Transwarp card, which was the cached
design.

--
-michael - NadaNet 3.1 and AppleCrate II: http://michaeljmahon.com
Re: Transwarp GS questions [message #357648 is a reply to message #357647] Thu, 30 November 2017 11:52 Go to previous messageGo to next message
Steven Hirsch is currently offline  Steven Hirsch
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On 11/30/2017 11:49 AM, Michael J. Mahon wrote:
> Steven Hirsch <snhirsch@gmail.com> wrote:
>> On 11/29/2017 09:29 PM, James Davis wrote:
>>> On Wednesday, November 29, 2017 at 11:16:18 AM UTC-8, James Davis wrote:
>>>> Didn't someone (maybe MJM) say (in an older post here) that the Transwarp
>>>> GS worked like the ZipChip does?
>>>
>>> Maybe it was just Transwarp, without the GS, that someone said worked like
>>> the ZipChip does.
>>
>> In the sense that it doesn't cooperate with DMA, that's true. Otherwise, they
>> are different in their operation. The ZipChip caches a working set of memory
>> blocks internally to support high-speed operation. The original Transwarp
>> completely replaces 128k of system memory with its own on-board RAM.
>
> I was referring to the late model Transwarp card, which was the cached
> design.

Yes, you're correct. Transwarp II was based on RocketChip, who were sued into
oblivion by Zip Technologies for patent violation. I had one of the them in
my hands for a brief period while contracting to AE. They recalled and
destroyed as many of them as they could get their hands on, resulting in a
very rare board.
Re: Transwarp GS questions [message #361514 is a reply to message #357637] Wed, 24 January 2018 10:34 Go to previous message
anthonypaulo is currently offline  anthonypaulo
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I read about this compatability with DMA which the original (non-GS) Transwarp did not have. Anyone know why the GS version has this and the original did not? Is there something unique about the GS that makes this possible?
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