Article-I.D.: rtech.413
Posted: Tue May 21 00:36:05 1985
Date-Received: Fri, 24-May-85 20:44:50 EDT
References: <627@abnji.UUCP>
Organization: Relational Technology, Alameda CA
Lines: 18
Xref: linus net.micro:9197 net.arch:1045

> There is much talk about the Z800.  I thought that I'd inject some
> facts straight from Zilog to substanciate the excitement...

Reality check: WHO CARES! (Sorry Zilog :-)   With the possible exception
of small volume embedded controllers, designers are unlikely to select
one of these chips.  CP/M is a fading memory; who is going to rush to
write a compiler for the Z800?  Why would anyone select a Z8-bizillion
when 68ks and 32ks (even 286s) are out there in reasonable volume now,
with software support?

Lest you accuse me of bias, I spent > year working on a Z8000 OS
destined for ROM.  Decent chip, but a loser.  Too Bad.

[this must be my opinion, i'm even writing it from home.]
-- 
{amdahl|dual|sun|zehntel}\		| Amusing quotation:
{ucbvax|decvax}!mtxinu---->!rtech!daveb | (To be supplied in a later
ihnp4!{phoenix|amdahl}___/		| revision of the signature.)

Article-I.D.: west44.578
Posted: Sat May 25 11:34:27 1985
Date-Received: Sat, 1-Jun-85 14:15:10 EDT
References: <627@abnji.UUCP> <413@rtech.UUCP>
Reply-To: agjenkin@kcl-cs.UUCP (Alun Jenkins)
Organization: Department of Computing, Kings College, University of London.
Lines: 40
Xref: linus net.micro:9343 net.arch:1107
Xpath: kcl-cs west44


Ha!!

If you had even bothered to read the Zilog spec for the Z80k you would
see that the 68000 looks like a mere toy in comparison. 
Does the 68k have an on chip MMU variable size segments, cache that run at 25MHz
, possible contiguous memory of 2^32 bytes. 32032 comes close but cant 
process as fast. As for instruction sets, so the  Z80k has a weird instruction
layout but what an instruction set.

Basic spec looks something like this......

	Features

1. 32 Bit architecture
2. many data types (bit, bit field, logical, signed int ,string ! etc.....
3. Z8000 binary compatible.

All internal data paths are full 32 bit implementations. The chip 
directly supports multiprocessing with memory interlocking.
The MMU supports full memory protection.

Anyway less of the technical drivel and on to the instruction set.

Just a few examples (6502 programmers just drool quietly in the corner).

CHK   compare destination and source bounds and if out of bound then trap

INDEX  calculate array index: check scale and accumulate 

ENTER  enter procedure. + EXIT procedure

CPSDR compare string decrement & repeat

If this chip does not succeed in a big way then the whole business sucks!

	Send flames to......................................................................
	Alun Jenkins     ...ukc!kcl-cs!agjenkin

Article-I.D.: utzoo.5647
Posted: Sat Jun  1 19:05:15 1985
Date-Received: Sat, 1-Jun-85 19:05:15 EDT
References: <627@abnji.UUCP> <413@rtech.UUCP>, <578@west44.kcl-cs.UUCP>
Organization: U of Toronto Zoology
Lines: 5

Alun, you forgot one key item of specs:  delivery date.  Zilog has been
making big promises about the Z8000000000 for a long, long time now.
-- 
				Henry Spencer @ U of Toronto Zoology
				{allegra,ihnp4,linus,decvax}!utzoo!henry

Article-I.D.: bmcg.1696
Posted: Thu May 30 15:51:15 1985
Date-Received: Sat, 1-Jun-85 23:49:15 EDT
References: <627@abnji.UUCP> <413@rtech.UUCP>
Reply-To: yrdbrd@bmcg.UUCP (Larry J. Huntley)
Organization: Burroughs Corp. ASG, San Diego, CA.
Lines: 13
Xref: watmath net.micro:10604 net.arch:1289
Summary: 

In article <413@rtech.UUCP> daveb@rtech.UUCP (Dave Brower) writes:
>  .................. CP/M is a fading memory; ........
Uh oh.  I'd hate to be Dave's local fire engine company.  That's right
folks, IT'S FIRE-BOMB TIME!

(Watch this space)
-- 
Larry J. Huntley         Burroughs -(B)- Corporation
                       Advanced Systems Group   MS-703
                  10850 Via Frontera   San Diego, CA  92128
                              (619)  485-4544
       
   -*- "Dear Friends, It's 'ORGAN LEROY' at his organ again." -*- 

Article-I.D.: utastro.180
Posted: Mon Jun  3 10:10:08 1985
Date-Received: Tue, 4-Jun-85 00:56:18 EDT
References: <627@abnji.UUCP> <413@rtech.UUCP>, <578@west44.kcl-cs.UUCP> <5647@utzoo.UUCP>
Organization: U. Texas, Astronomy, Austin, TX
Lines: 13
Xref: linus net.micro:9383 net.arch:1120

> Alun, you forgot one key item of specs:  delivery date.  Zilog has been
> making big promises about the Z8000000000 for a long, long time now.
> -- 
> 				Henry Spencer @ U of Toronto Zoology
> 				{allegra,ihnp4,linus,decvax}!utzoo!henry

For every year they slip, they add another zero to the name. :-)

-- 
Ed Nather
Astronony Dept, U of Texas @ Austin
{allegra,ihnp4}!{noao,ut-sally}!utastro!nather
nather%utastro.UTEXAS@ut-sally.ARPA

Article-I.D.: ecsvax.1382
Posted: Mon Jun  3 16:09:04 1985
Date-Received: Thu, 6-Jun-85 04:35:57 EDT
References: <627@abnji.UUCP> <413@rtech.UUCP>, <1696@bmcg.UUCP>
Organization: Duke U Comp Ctr
Lines: 15
Xref: watmath net.micro:10667 net.arch:1314

> yrdbrd@bmcg.UUCP (Larry J. Huntley) notes:
> In article <413@rtech.UUCP> daveb@rtech.UUCP (Dave Brower) writes:
> 
> >  .................. CP/M is a fading memory; ........
> 
> Uh oh.  I'd hate to be Dave's local fire engine company.  That's right
> folks, IT'S FIRE-BOMB TIME!

Yep.  Well, folks, what do you say?  Is it time to create
net.flames.wanted?
-- 
D Gary Grady
Duke U Comp Center, Durham, NC  27706
(919) 684-3695
USENET:  {seismo,decvax,ihnp4,akgua,etc.}!mcnc!ecsvax!dgary

Article-I.D.: peregrin.117
Posted: Thu Jun  6 14:04:52 1985
Date-Received: Fri, 7-Jun-85 03:28:45 EDT
References: <627@abnji.UUCP> <413@rtech.UUCP> <578@west44.kcl-cs.UUCP>
Organization: Peregrine, Systems, Irvine, Ca
Lines: 22
Xref: watmath net.micro:10688 net.arch:1327

> 
> Ha!!
> 
> If you had even bothered to read the Zilog spec for the Z80k you would
> see that the 68000 looks like a mere toy in comparison. 
> Does the 68k have an on chip MMU variable size segments, cache that run at 25MHz
> Anyway less of the technical drivel and on to the instruction set.
> 
> Just a few examples (6502 programmers just drool quietly in the corner).
> 
> CHK   compare destination and source bounds and if out of bound then trap
> 
> INDEX  calculate array index: check scale and accumulate 
> 
> ENTER  enter procedure. + EXIT procedure
> 
> CPSDR compare string decrement & repeat
> 
> If this chip does not succeed in a big way then the whole business sucks!
> 
Oh well!  So much for RISC.
Bye the way you can get 68020's, and 32032's.  Where can I get a Z80000?